XC3S100E-4TQG144I Xilinx Inc, XC3S100E-4TQG144I Datasheet - Page 70

IC FPGA SPARTAN-3E 100K 144-TQFP

XC3S100E-4TQG144I

Manufacturer Part Number
XC3S100E-4TQG144I
Description
IC FPGA SPARTAN-3E 100K 144-TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S100E-4TQG144I

Package / Case
144-TQFP, 144-VQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
108
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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available SPI Flash PROMs use different command proto-
cols. The FPGA’s variant select pins, VS[2:0], define how
the FPGA communicates with the SPI Flash, including
which SPI Flash command the FPGA issues to start the
read operation and the number of dummy bytes inserted
before the FPGA expects to receive valid data from the SPI
Flash.
expected to operate with Spartan-3E FPGAs. Other com-
patible devices might work but have not been tested for suit-
ability with Spartan-3E FPGAs. All other VS[2:0] values are
reserved for future use.
DS312-2 (v1.1) March 21, 2005
Advance Product Specification
S
Although SPI is a standard four-wire interface, various
Recommend
Table 45
open-drain
PROG_B
Figure 50: SPI Flash PROM Interface for PROMs Supporting READ (0x03) and FAST_READ (0x0B)
driver
TMS
TDO
TCK
TDI
R
+2.5V
JTAG
shows the available SPI Flash PROMs
Variant Select
SPI Mode
S
‘0’
‘0’
‘1’
‘1’
‘1’
P
HSWAP
M2
M1
M0
VS2
VS1
VS0
TDI
TMS
TCK
PROG_B
Spartan-3E
VCCINT
FPGA
+1.2V
GND
VCCAUX
VCCO_0
VCCO_2
CSO_B
INIT_B
DONE
DOUT
www.xilinx.com
CCLK
MOSI
TDO
DIN
Figure 50
SPI Flash PROMs that support the 0x03 READ command
or the 0x0B FAST READ commands.
Figure 51
DataFlash serial PROMs, which also use an SPI-based pro-
tocol.
Figure 54
with different configurations, all stored in a single SPI Flash.
The diagram uses standard SPI Flash memories but the
same general technique applies for Atmel DataFlash.
VCCO_0
+3.3V
+2.5V
shows the general connection diagram for those
demonstrates how to configure multiple FPGAs
shows the connection diagram for Atmel
I
W
‘1’
P
+3.3V
DATA_IN
DATA_OUT
SELECT
WR_PROTECT
HOLD
CLOCK
+2.5V
+3.3V
GND
DS312-2_46_021405
VCC
Functional Description
Serial
Flash
SPI
63

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