EP2S30F672C5N Altera, EP2S30F672C5N Datasheet - Page 205
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EP2S30F672C5N
Manufacturer Part Number
EP2S30F672C5N
Description
IC STRATIX II FPGA 30K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S30F672C5N
Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
500
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
33880
# I/os (max)
500
Frequency (max)
609.76MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
33880
Ram Bits
1369728
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
Family Type
Stratix II
No. Of I/o's
500
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Operating Temperature Range
0°C To +85°C
Logic Case Style
BGA
No. Of Pins
672
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1898
EP2S30F672C5N
EP2S30F672C5N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S30F672C5N
Manufacturer:
ALTERA
Quantity:
238
Part Number:
EP2S30F672C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
April 2011
3.3-V LVTTL
3.3-V LVCMOS
2.5-V
LVTTL/LVCMOS
1.8-V
LVTTL/LVCMOS
1.5-V
LVTTL/LVCMOS
SSTL-2 Class I
SSTL-2 Class II
Table 5–78. Maximum Output Toggle Rate on Stratix II Devices (Part 1 of 5)
I/O Standard
Strength
12 mA
16 mA
20 mA
24 mA
12 mA
16 mA
20 mA
24 mA
12 mA
16 mA
10 mA
12 mA
12 mA
20 mA
24 mA
16 mA
Drive
4 mA
8 mA
4 mA
8 mA
4 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
8 mA
1,030
1,020
1,066
1,100
1,131
Column I/O Pins (MHz)
270
435
580
720
875
290
565
790
230
430
630
930
120
285
450
660
905
244
470
550
625
400
400
350
400
400
-3
1,040
1,040
225
355
475
594
700
794
250
480
710
925
985
194
380
575
845
109
250
390
570
805
200
370
430
495
300
400
350
350
400
-4
1,000
210
325
420
520
610
670
230
440
670
875
935
180
380
550
820
104
230
360
520
755
990
180
325
375
420
300
350
300
350
350
-5
270
435
580
290
565
230
430
630
120
285
450
660
244
470
400
350
Row I/O Pins (MHz)
-3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Stratix II Device Handbook, Volume 1
225
355
475
250
480
194
380
575
109
250
390
570
200
370
350
350
-4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DC & Switching Characteristics
210
325
420
230
440
180
380
550
104
230
360
520
180
325
350
300
-5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Note (1)
1,030
1,020
1,066
1,100 1,040 1,000
1,131 1,040
Clock Outputs (MHz)
270
435
580
720
875
290
565
790
230
430
630
930
120
285
450
660
905
244
470
550
625
400
400
350
400
400
-3
225
355
475
594
700
794
250
480
710
925
985
194
380
575
845
109
250
390
570
805
200
370
430
495
300
400
350
350
400
-4
210
325
420
520
610
670
230
440
670
875
935
180
380
550
820
104
230
360
520
755
990
180
325
375
420
300
350
300
350
350
-5
5–69