AD9775BSVRL Analog Devices Inc, AD9775BSVRL Datasheet - Page 43

• Manufacturer Part Number: AD9775BSVRL
• Description: IC DAC 14BIT DUAL 160MSPS 80TQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9775BSVRL

• Rohs Status: RoHS non-compliant
• Settling Time: 11ns
• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 410mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• For Use With: AD9775-EBZ - BOARD EVALUATION FOR AD9775

DIFFERENTIAL COUPLING USING AN OP AMP
An op amp can also be used to perform a differential-to-single-
ended conversion, as shown in Figure 99. This has the added
benefit of providing signal gain as well. In Figure 99, the
AD9775 is configured with two equal load resistors, R
25 Ω. The differential voltage developed across I
converted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
I
addition of this capacitor also enhances the op amp distortion
performance by preventing the DAC fast slewing output from
overloading the input of the op amp.
The common-mode (and second-order distortion) rejection of
this configuration is typically determined by the resistor
matching. The op amp used must operate from a dual supply
because its output is approximately ±1.0 V. A high speed
amplifier, such as the AD8021, capable of preserving the
differential performance of the AD9775 while meeting other
system level objectives (such as cost and power) is
recommended. The op amp differential gain, its gain setting
resistor values, and full-scale output swing capabilities should
all be considered when optimizing this circuit. R
necessary if level shifting is required on the op amp output. In
Figure 99, AVDD, which is the positive analog supply for both
the AD9775 and the op amp, is also used to level shift the
differential output of the AD9775 to midsupply, that is,
AVDD/2.
INTERFACING THE AD9775 WITH THE AD8345
QUADRATURE MODULATOR
The AD9775 architecture was defined to operate in a transmit
signal chain using an image reject architecture. A quadrature
modulator is also required in this application and should be
designed to meet the output characteristics of the DAC as much
as possible. The AD8345 from Analog Devices meets many of
the requirements for interfacing with the AD9775. As with any
DAC output interface, there are a number of issues that have to
be resolved. The following sections list some of these issues.
DAC Compliance Voltage/Input Common-Mode Range
The dynamic range of the AD9775 is optimal when the DAC
outputs swing between ±1.0 V. The input common-mode range
of the AD8345, at 0.7 V, allows optimum dynamic range to be
achieved in both components.
OUTA
and I
DAC
I
I
OUTA
OUTB
OUTB
25Ω
Figure 99. Op Amp-Coupled Output Circuit
, forming a real pole in a low-pass filter. The
C
OPT
25Ω
225Ω
225Ω
500Ω
AD8021
500Ω
R
225Ω
OPT
OUTA
OPT
AVDD
is only
and I
LOAD
, of
OUTB
Rev. E | Page 43 of 56
is
Gain/Offset Adjust
The matching of the DAC output to the common-mode input
of the AD8345 allows the two components to be dc-coupled,
with no level shifting necessary. The combined voltage offset of
the two parts can therefore be compensated for via the AD9775
programmable offset adjust. This allows excellent LO cancella-
tion at the AD8345 output. The programmable gain adjust
allows for optimal image rejection as well.
The AD9775 evaluation board includes an AD8345 and
recommended interface (Figure 104 and Figure 105). On the
output of the AD9775, R9 and R10 convert the DAC output
current to a voltage. R16 may be used to do a slight common-
mode shift if necessary. The (now voltage) signal is applied to a
low-pass reconstruction filter to reject DAC images. The
components installed on the AD9775 provide a 35 MHz cutoff
but may be changed to fit the application. A balun (Mini-
Circuits ADTL1-12) is used to cross the ground plane boundary
to the AD8345. Another balun (Mini-Circuits ETC1-1-13) is
used to couple the LO input of the AD8345. The interface
requires a low ac impedance return path from the AD8345, so a
single connection between the AD9775 and AD8345 ground
planes is recommended.
The performance of the AD9775 and AD8345 in an image reject
transmitter, reconstructing three W-CDMA carriers, can be seen in
Figure 100. The LO of the AD8345 in this application is 800 MHz.
Image rejection (50 dB) and LO feedthrough (−78 dBFS) have been
optimized with the programmable features of the AD9775. The
average output power of the digital waveform for this test was set
to −15 dBFS to account for the peak-to-average ratio of the
W-CDMA signal.
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
762.5
0
Figure 100. AD9775/AD8345 Synthesizing a Three-Carrier
W-CDMA Signal at an LO of 800 MHz
782.5
FREQUENCY (MHz)
802.5
822.5
AD9775
842.5