AD9775BSVRL Analog Devices Inc, AD9775BSVRL Datasheet - Page 36

• Manufacturer Part Number: AD9775BSVRL
• Description: IC DAC 14BIT DUAL 160MSPS 80TQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9775BSVRL

• Rohs Status: RoHS non-compliant
• Settling Time: 11ns
• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 410mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• For Use With: AD9775-EBZ - BOARD EVALUATION FOR AD9775

AD9775
ZERO STUFFING
(Control Register 0x01, Bit 3)
As shown in Figure 75, a 0 or null in the output frequency
response of the DAC (after interpolation, modulation, and DAC
reconstruction) occurs at the final DAC sample rate (f
is due to the inherent sin(x)/x roll-off response in the digital-to-
analog conversion. In applications where the desired frequency
content is below f
f
this roll-off may be problematic due to the increased pass-band
amplitude variation as well as the reduced amplitude of the
desired signal.
Consider an application where the digital data into the AD9775
represents a baseband signal around f
f
experience only a 0.75 dB amplitude variation over its pass band.
However, the image of the same signal occurring at 3 × f
suffers from a pass-band flatness variation of 3.93 dB. This image
may be the desired signal in an IF application using one of the
various modulation modes in the AD9775. This roll-off of image
frequencies can be seen in Figure 59 to Figure 74, where the effect
of the interpolation and modulation rate is apparent as well.
To improve upon the pass-band flatness of the desired image,
the zero stuffing mode can be enabled by setting the control
register bit to Logic 1. This option increases the ratio of
f
inserting a midscale sample (that is, 1000 0000 0000 0000) after
every data sample originating from the interpolation filter. This
is important as it affects the PLL divider ratio needed to keep
the VCO within its optimum speed range. Note that the zero
stuffing takes place in the digital signal chain at the output of
the digital modulator before the DAC.
The net effect is to increase the DAC output sample rate by a
factor of 2× with the 0 in the sin(x)/x DAC transfer function
occurring at twice the original frequency. A 6 dB loss in
amplitude at low frequencies is also evident (see Figure 75).
DAC
DAC
DAC
/10. The reconstructed signal out of the AD9775 would
/2 the loss due to sin(x)/x is 4 dB. In direct RF applications,
/f
–10
–20
–30
–40
–50
10
DATA
f
0
OUT
Figure 75. Effect of Zero Stuffing on DAC’s sin(x)/x Response
0
, NORMALIZED TO
by a factor of 2 by doubling the DAC sample rate and
ZERO STUFFING
DISABLED
DAC
0.5
/2, this may not be a problem. Note that at
f
DATA
WITH ZERO STUFFING DISABLED (Hz)
1.0
ZERO STUFFING
DAC
ENABLED
/4 with a pass band of
1.5
DAC
DAC
2.0
/4
). This
Rev. E | Page 36 of 56
Note that the zero-stuffing option by itself does not change the
location of the images but rather their amplitude, pass-band
flatness, and relative weighting. For instance, in the previous
example, the pass-band amplitude flatness of the image at
3 × f
slightly from −10.5 dBFS to −8.1 dBFS.
INTERPOLATING (COMPLEX MIX MODE)
(Control Register 0x01, Bit 2)
In the complex mix mode, the two digital modulators on the
AD9775 are coupled to provide a complex modulation function.
In conjunction with an external quadrature modulator, this
complex modulation can be used to realize a transmit image
rejection architecture. The complex modulation function can be
programmed for e
rejection. As in the real modulation mode, the modulation
frequency ω can be programmed via the SPI port for f
f
OPERATIONS ON COMPLEX SIGNALS
Truly complex signals cannot be realized outside of a computer
simulation. However, two data channels, both consisting of real
data, can be defined as the real and imaginary components of a
complex signal. I (real) and Q (imaginary) datapaths are often
defined this way. By using the architecture defined in Figure 76,
a system can be realized that operates on complex signals,
giving a complex (real and imaginary) output.
If a complex modulation function (e
imaginary components of the system correspond to the real and
imaginary components of e
shows, the complex modulation function can be realized by
applying these components to the structure of the complex
system defined in Figure 76.
DAC
/4, and f
DATA
/4 improved to +0.59 dB while the signal level increased
(IMAGINARY)
a(t)
b(t)
Figure 77. Implementation of a Complex Modulator
DAC
Figure 76. Realization of a Complex System
(REAL)
INPUT
INPUT
/8, where f
INPUT
INPUT
COMPLEX FILTER
+jωt
IMAGINARY
= (c + jd)
e
–jωt
or e
OUTPUT
OUTPUT
= COSωt + jSINωt
−jωt
DAC
90°
+jωt
to give upper or lower image
represents the DAC output rate.
or cosωt and sinωt. As Figure 77
c(t) × b(t) + d × b(t)
b(t) × a(t) + c × b(t)
+jωt
OUTPUT
(REAL)
OUTPUT
(IMAGINARY)
) is desired, the real and
DAC
/2,