KSZ8851SNLI Micrel Inc, KSZ8851SNLI Datasheet - Page 33

KSZ8851SNLI

Manufacturer Part Number
KSZ8851SNLI
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8851SNLI

Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Supplier Unconfirmed

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Micrel, Inc.
KSZ8851SNL/SNLI
SPI Interface to I/O Registers
The KSZ8851SNL provides a SPI interface for the host CPU to access its internal I/O registers. I/O registers serve as the
address that the microprocessor uses when communicating with the device. This is used for configuring operational
settings, reading or writing control, status information, and transferring packets.
I/O Registers
The following I/O Space Mapping Tables apply to 8-bit, 16-bit or 32-bit access. Depending upon the byte enable bits
B[3:0] settings in command phase, each I/O access can be performed the following operations as an 8-bit for 256 address
locations, 16-bit for 128 address locations or 32-bit for 64 address locations.
August 2009
33
M9999-083109-2.0

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