KSZ8851SNLI Micrel Inc, KSZ8851SNLI Datasheet - Page 28

• Manufacturer Part Number: KSZ8851SNLI
• Manufacturer: Micrel Inc

Specifications of KSZ8851SNLI

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Supplier Unconfirmed

August 2009
Micrel, Inc.
Host receives an multiple Ethernet pkts
from upper layer and prepares transmit
Write an 1?to RXQCR[3] reg to enable
that the TXQ has completed to transmit
ID). Each transmit queue frame format
Option to read ISR[14] reg, it indicates
data (control word, byte count and pkt
TXQ write access, then Host issues a
data) to TXQ memory. This is moving
SPI opcode=11 to start write transmit
pkts data (data, data_length, frame
Write an 0?to RXQCR[3] reg to end
to issue a transmit command (auto-
enqueue) to the TXQ. The TXQ will
KSZ8851SNL TXQ memory until all
Memory size is available for these
transmit all data to the PHY port
Write an 1?to TXQCR[2] reg
all pkts to the PHY port, then
Check if KSZ8851SNL TXQ
transmit data from Host to
Write 1?to clear this bit
Figure 12. Host TX Multiple Frames in Auto- Enqueue Flow Diagram
is shown in Table 6
(Read TXMIR Reg)
TXQ write access
pkts are finished
transmit pkts?
Yes
No
28
Yes
word count in TXNTFSR[15:0] register
Write the total amount of TXQ buffer
transmit total frames size in double-
enable the TXQ memory available
Set bit 1=1 in TXQCR register to
space which is required for next
(memory space available)
and check if the bit 6=1
Wait for interrupt
in ISR register
monitor
?
No
KSZ8851SNL/SNLI
M9999-083109-2.0