S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 275

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S9S08SG16E1CTJ

Manufacturer Part Number
S9S08SG16E1CTJ
Description
Manufacturer
Freescale
Datasheet

Specifications of S9S08SG16E1CTJ

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
SCI/SPI
Total Internal Ram Size
1KB
# I/os (max)
16
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
16KB
Lead Free Status / RoHS Status
Compliant
Figure 17-4
asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge on
BKGD to the start of the bit time as perceived by the target MCU. The host initiates the bit time but the
target HCS08 finishes it. Because the target wants the host to receive a logic 0, it drives the BKGD pin low
for 13 BDC clock cycles, then briefly drives it high to speed up the rising edge. The host samples the bit
level about 10 cycles after starting the bit time.
Freescale Semiconductor
SPEED-UP PULSE
PERCEIVED START
TO BKGD PIN
TARGET MCU
(TARGET MCU)
HOST DRIVE
DRIVE AND
BDC CLOCK
OF BIT TIME
BKGD PIN
shows the host receiving a logic 0 from the target HCS08 MCU. Because the host is
Figure 17-4. BDM Target-to-Host Serial Bit Timing (Logic 0)
10 CYCLES
MC9S08SG32 Data Sheet, Rev. 8
HOST SAMPLES BKGD PIN
10 CYCLES
HIGH-IMPEDANCE
SPEEDUP
PULSE
Chapter 17 Development Support
EARLIEST START
OF NEXT BIT
275

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