S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 266

• Manufacturer Part Number: S9S08SG16E1CTJ
• Manufacturer: Freescale

Specifications of S9S08SG16E1CTJ

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

Chapter 16 Timer/PWM Module (S08TPMV3)
266
TPMxCNTH:TPMxCNTL
TPMxCNTH:TPMxCNTL
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
EPWM mode
EPWM mode
(in TPMv2 and TPMv3)
(in TPMv2 and TPMv3)
TPMv2 TPMxCHn
TPMv2 TPMxCHn
CLKSB:CLKSA BITS
CLKSB:CLKSA BITS
TPMv3 TPMxCHn
TPMv3 TPMxCHn
ELSnB:ELSnA BITS
ELSnB:ELSnA BITS
RESET (active low)
RESET (active low)
MSnB:MSnA BITS
MSnB:MSnA BITS
The following procedure can be used in TPM v3 (when the channel pin is also a port pin) to emulate
the high-true EPWM generated by TPM v2 after the reset.
BUS CLOCK
Figure 16-17. Generation of high-true EPWM signal by TPM v2 and v3 after the reset
BUS CLOCK
Figure 16-18. Generation of low-true EPWM signal by TPM v2 and v3 after the reset
CHnF BIT
CHnF BIT
00
00
00
00
MC9S08SG32 Data Sheet, Rev. 8
00
00
0
0
10
10
10
01
1 2 3 4 5 6 7
1 2 3 4 5 6 7
Freescale Semiconductor
01
01
0 1
0 1
2
2
...
...