FW82801BA S L5PN Intel, FW82801BA S L5PN Datasheet - Page 355
FW82801BA S L5PN
Manufacturer Part Number
FW82801BA S L5PN
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5PN.pdf
(671 pages)
Specifications of FW82801BA S L5PN
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9.3.3
9.4
9.4.1
Intel
®
Table 143. PIC Registers (LPC I/F—D31:F0)
82801EB ICH5 / 82801ER ICH5R Datasheet
Note: Refer to note addressing active-low interrupt sources in 8259 Interrupt Controllers section
Counter Access Ports Register
(LPC I/F—D31:F0)
I/O Address:
Default Value:
8259 Interrupt Controller (PIC) Registers
(LPC I/F—D31:F0)
Interrupt Controller I/O MAP (LPC I/F—D31:F0)
The interrupt controller registers are located at 20h and 21h for the master controller (IRQ 0
and at A0h and A1h for the slave controller (IRQ 8
depending upon the data written to them.
each address.
(Section
4D0h
4D1h
Bit
7:0
Port
20h
21h
A0h
A1h
5.8).
Counter Port — R/W. Each counter port address is used to program the 16-bit Count register. The
order of programming, either LSB only, MSB only, or LSB then MSB, is defined with the Interval
Counter Control register at port 43h. The counter port is also used to read the current count from the
Count register, and return the status of the counter programming following a Read Back command.
24h, 28h,
2Ch, 30h,
34h, 38h, 3Ch
25h, 29h,
2Dh, 31h,
35h, 39h, 3Dh
A4h, A8h,
ACh, B0h,
B4h, B8h, BCh
A5h, A9h,
ADh, B1h,
B5h, B9h, BDh
Aliases
–
–
Counter 0
Counter 1
Counter 2
All bits undefined
Master PIC ICW1 Init. Cmd Word 1
Master PIC OCW2 Op Ctrl Word 2
Master PIC OCW3 Op Ctrl Word 3
Master PIC ICW2 Init. Cmd Word 2
Master PIC ICW3 Init. Cmd Word 3
Master PIC ICW4 Init. Cmd Word 4
Master PIC OCW1 Op Ctrl Word 1
Slave PIC ICW1 Init. Cmd Word 1
Slave PIC OCW2 Op Ctrl Word 2
Slave PIC OCW3 Op Ctrl Word 3
Slave PIC ICW2 Init. Cmd Word 2
Slave PIC ICW3 Init. Cmd Word 3
Slave PIC ICW4 Init. Cmd Word 4
Slave PIC OCW1 Op Ctrl Word 1
Master PIC Edge/Level Triggered
Slave PIC Edge/Level Triggered
–
–
–
40h,
41h,
42h
Register Name
Table 143
Description
–
LPC Interface Bridge Registers (D31:F0)
Attribute:
Size:
shows the different register possibilities for
13). These registers have multiple functions,
R/W
8 bit
Default Value
001XXXXXb
001XXXXXb
X01XXX10b
X01XXX10b
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
01h
00h
01h
00h
00h
00h
Type
R/W
R/W
R/W
R/W
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
–
7),
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