FW82801BA S L5PN Intel, FW82801BA S L5PN Datasheet - Page 295
FW82801BA S L5PN
Manufacturer Part Number
FW82801BA S L5PN
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5PN.pdf
(671 pages)
Specifications of FW82801BA S L5PN
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7.2.9
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
FLOW_CNTL—Flow Control Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
15:13
Bit
7:3
2:0
12
11
10
9
8
Reserved
FC Paused Low — RO.
0 = Cleared when the FC timer reaches 0, or a Pause frame is received.
1 = Set when the LAN controller receives a Pause Low command with a value greater than 0.
FC Paused — RO.
0 = Cleared when the FC timer reaches 0.
1 = Set when the LAN controller receives a Pause command regardless of its cause (FIFO reaching
FC Full — RO.
0 = Cleared when the FC timer reaches 0.
1 = Set when the LAN controller sends a Pause command with a value greater than 0.
Xoff — R/W (special). This bit should only be used if the LAN controller is configured to operate with
IEEE frame-based flow control.
0 = This bit can only be cleared by writing a 1 to the Xon bit (bit 8 in this register).
1 = Writing a 1 to this bit forces the Xoff request to 1 and causes the LAN controller to behave as if
Xon — WO. This bit should only be used if the LAN controller is configured to operate with IEEE
frame-based flow control.
0 = This bit always returns 0 on reads.
1 = Writing a 1 to this bit resets the Xoff request to the LAN controller, clearing bit 9 in this register.
Reserved
Flow Control Threshold — R/W. The LAN controller can generate a Flow Control Pause frame
when its Receive FIFO is almost full. The value programmed into this field determines the number of
bytes still available in the Receive FIFO when the Pause frame is generated.
Bits 2:0
000
001
010
011
100
101
110
111
Flow Control Threshold, fetching a Receive Frame Descriptor with its Flow Control Pause bit
set, or software writing a 1 to the Xoff bit).
the FIFO extender is full. This bit will also be set to 1 when an Xoff request due to an “RFD Xoff”
bit.
19
0000h
Free Bytes
in Receive FIFOComment
0.50 KB
1.00 KB
1.25 KB
1.50 KB
1.75 KB
2.00 KB
2.25 KB
2.50 KB
–
1Ah
Fast system (recommended default)
Slow system
Description
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
RO, R/W (special)
16 bits
295
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