FW82801BA S L5PN Intel, FW82801BA S L5PN Datasheet - Page 321
FW82801BA S L5PN
Manufacturer Part Number
FW82801BA S L5PN
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5PN.pdf
(671 pages)
Specifications of FW82801BA S L5PN
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9.1.5
9.1.6
9.1.7
9.1.8
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RID—Revision Identification Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
PI—Programming Interface Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
SCC—Sub Class Code Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
BCC—Base Class Code Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
Revision ID — RO. 8-bit value that indicates the revision number for the LPC bridge. For the A-0
stepping, this value is 00h.
NOTE: Refer to the latest Intel
Programming Interface — RO.
Sub Class Code — RO. 8-bit value that indicates the category of bridge for the LPC PCI bridge.
Base Class Code — RO. 8-bit value that indicates the type of device for the LPC bridge.
06h = Bridge device.
Identification register.
08h
See bit description
09h
00h
0Ah
01h
0Bh
06h
®
ICH5 / ICH5R Specification Update for the value of the Revision
Description
Description
Description
Description
LPC Interface Bridge Registers (D31:F0)
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
RO
8 bits
RO
8 bits
RO
8 bits
RO
8 bits
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