FW82801BA S L5PN Intel, FW82801BA S L5PN Datasheet - Page 281
FW82801BA S L5PN
Manufacturer Part Number
FW82801BA S L5PN
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5PN.pdf
(671 pages)
Specifications of FW82801BA S L5PN
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7.1.11
7.1.12
7.1.13
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Note: The ICH5’s integrated LAN controller requires one BAR for memory mapping. Software
Note: The ICH5’s integrated LAN controller requires one BAR for memory mapping. Software
CSR_MEM_BASE — CSR Memory-Mapped Base Address
Register (LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
determines which BAR (memory or I/O) is used to access the LAN controller’s CSR registers.
CSR_IO_BASE — CSR I/O-Mapped Base Address Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
determines which BAR (memory or I/O) is used to access the LAN controller’s CSR registers.
SVID — Subsystem Vendor Identification Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
31:12
31:16
15:6
15:0
11:4
Bit
2:1
Bit
5:1
Bit
3
0
0
Base Address (MEM_ADDR) — R/W. This field contains the upper 20 bits of the base address
provides 4 KB of memory-Mapped space for the LAN controller’s CSR registers.
Reserved
Prefetchable (MEM_PF) — RO. Hardwired to 0 to indicate that this is not a pre-fetchable memory-
Mapped address range.
Type (MEM_TYPE) — RO. Hardwired to 00b to indicate the memory-mapped address range may be
located anywhere in 32-bit address space.
Memory-Space Indicator (MEM_SPACE) — RO. Hardwired to 0 to indicate that this base address
maps to memory space.
Reserved
Base Address (IO_ADDR) — R/W. This field provides 64 bytes of I/O-mapped address space for
the LAN controller’s CSR.
Reserved
I/O Space Indicator (IO_SPACE) — RO. Hardwired to 1 to indicate that this base address maps to
I/O space.
Subsystem Vendor ID (SVID) — RO. See
10
00000008h
14
00000001h
2C
0000h
–
–
–
13h
17h
2D
Section 7.1.14
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
for details.
R/W, RO
32 bits
R/W, RO
32 bits
RO
16 bits
281
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