RD38F2240WWYTQ0SB93 Micron Technology Inc, RD38F2240WWYTQ0SB93 Datasheet - Page 48

• Manufacturer Part Number: RD38F2240WWYTQ0SB93
• Manufacturer: Micron Technology Inc

Specifications of RD38F2240WWYTQ0SB93

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Figure 30: Example of PSRAM Burst Suspend with Read Burst with Latency Code 2
Note:
9.6.2
Datasheet
48
WAIT is configured as Active Low and asserted during delay.
A[MAX:0]
UB#/LB#
DQ[15:0]
PSRAM Burst Interrupt
In burst interrupt an on-going burst is ended and new burst command issued while
keeping CE# low (subject to tCSL restrictions.) To insure proper device operation, a
burst interrupt is prohibited until the previous burst-init command completes its first
valid data transaction. If a burst read is interrupted by a new burst command, the DQ
are put into a high-Z state (within tWHZ time period.) If a burst write is interrupted by
a new burst command, the write data is automatically masked regardless of UB#/LB#
setting. Also note, that prior to initiating a burst interrupt by taking ADV# low, the
ADV# high hold time of tHD must be met with respect to the previous clock cycle
ADV#
WAIT
WE#
CLK
CE#
OE#
tCSS
tCWT
tABA
tAOE
tOL
tWK
tACLK
D0
tOD
tKOH
tCSL
tCSL
tAOE
tOL
128-Mbit W18 Family with Synchronous PSRAM
D1
tKOH
D2
D3
Order Number: 311760-10
tWZ
tOD
November 2007