PIC18F44K20-E/MV Microchip Technology, PIC18F44K20-E/MV Datasheet - Page 62

16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU

PIC18F44K20-E/MV

Manufacturer Part Number
PIC18F44K20-E/MV
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F44K20-E/MV

Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC18F2XK20/4XK20
TABLE 4-4:
DS41303G-page 62
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISE
TRISD
TRISC
TRISB
TRISA
LATE
LATD
LATC
LATB
LATA
PORTE
PORTD
PORTC
PORTB
PORTA
ANSELH
ANSEL
IOCB
WPUB
CM1CON0
CM2CON0
Legend:
Note 1:
Register
(5)
(5)
2:
3:
4:
5:
6:
(5)
(6)
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
PIC18F2XK20 PIC18F4XK20
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Applicable Devices
Brown-out Reset
Power-on Reset,
1111 1111
0000 0000
0000 0000
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
0000 0000
---- -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- x000
---- x---
xxxx xxxx
xxxx xxxx
xxx0 0000
xx0x 0000
---1 1111
1111 1111
0000 ----
1111 1111
0000 0000
0000 0000
(5)
(5)
(5)
RESET Instruction,
MCLR Resets,
1111 1111
0000 0000
0000 0000
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
0000 0000
---- -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- u000
---- u---
uuuu uuuu
uuuu uuuu
uuu0 0000
uu0u 0000
Stack Resets
WDT Reset,
---1 1111
1111 1111
0000 ----
1111 1111
0000 0000
0000 0000
(5)
(5)
(5)
 2010 Microchip Technology Inc.
Wake-up via WDT
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
---- u---
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
or Interrupt
---u uuuu
uuuu uuuu
uuuu ----
uuuu uuuu
uuuu uuuu
uuuu uuuu
(1)
(1)
(1)
(5)
(5)
(5)

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