PIC18F44K20-E/MV Microchip Technology, PIC18F44K20-E/MV Datasheet - Page 205

• Manufacturer Part Number: PIC18F44K20-E/MV
• Description: 16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F44K20-E/MV

• Processor Series: PIC18
• Core: PIC18F
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, SCI, USB, MSSP, RJ11
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Supply Current (max): 30 uA
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

REGISTER 17-5:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
WCOL
R/W-0
WCOL: Write Collision Detect bit
In Master Transmit mode:
1 = A write to the SSPBUF register was attempted while the I
0 = No collision
In Slave Transmit mode:
1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared by
0 = No collision
In Receive mode (Master or Slave modes):
This is a “don’t care” bit.
SSPOV: Receive Overflow Indicator bit
In Receive mode:
1 = A byte is received while the SSPBUF register is still holding the previous byte (must be cleared
0 = No overflow
In Transmit mode:
This is a “don’t care” bit in Transmit mode.
SSPEN: Synchronous Serial Port Enable bit
1 = Enables the serial port and configures the SDA and SCL pins as the serial port pins. When
0 = Disables serial port and configures these pins as I/O port pins
CKP: SCK Release Control bit
In Slave mode:
1 = Release clock
0 = Holds clock low (clock stretch), used to ensure data setup time
In Master mode:
Unused in this mode.
SSPM<3:0>: Synchronous Serial Port Mode Select bits
1111 = I
1110 = I
1011 = I
1000 = I
0111 = I
0110 = I
Bit combinations not specifically listed here are either reserved or implemented in SPI mode only.
SSPOV
R/W-0
mission to be started (must be cleared by software)
software)
by software)
enabled, the SDA and SCL pins must be configured as inputs.
SSPCON1: MSSP CONTROL 1 REGISTER (I
2
2
2
2
2
2
C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
C Firmware Controlled Master mode (Slave Idle)
C Master mode, clock = F
C Slave mode, 10-bit address
C Slave mode, 7-bit address
W = Writable bit
‘1’ = Bit is set
SSPEN
R/W-0
R/W-0
CKP
OSC
/(4 * (SSPADD + 1))
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSPM3
R/W-0
PIC18F2XK20/4XK20
2
C MODE)
SSPM2
2
R/W-0
C conditions were not valid for a trans-
x = Bit is unknown
SSPM1
R/W-0
DS41303G-page 205
SSPM0
R/W-0
bit 0