PIC18F44K20-E/MV Microchip Technology, PIC18F44K20-E/MV Datasheet - Page 138

16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU

PIC18F44K20-E/MV

Manufacturer Part Number
PIC18F44K20-E/MV
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F44K20-E/MV

Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC18F2XK20/4XK20
10.8
The output slew rate of each port is programmable to
select either the standard transition rate or a reduced
transition rate of 0.1 times the standard to minimize
EMI. The reduced transition time is the default slew
rate for all ports.
REGISTER 10-4:
DS41303G-page 138
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
2:
Port Slew Rate Control
These bits are not implemented on PIC18F2XK20 devices.
The slew rate of RA6 defaults to standard rate when the pin is used as CLKOUT.
Unimplemented: Read as ‘0’
SLRE: PORTE Slew Rate Control bit
1 = All outputs on PORTE slew at a limited rate
0 = All outputs on PORTE slew at the standard rate
SLRD: PORTD Slew Rate Control bit
1 = All outputs on PORTD slew at a limited rate
0 = All outputs on PORTD slew at the standard rate
SLRC: PORTC Slew Rate Control bit
1 = All outputs on PORTC slew at a limited rate
0 = All outputs on PORTC slew at the standard rate
SLRB: PORTB Slew Rate Control bit
1 = All outputs on PORTB slew at a limited rate
0 = All outputs on PORTB slew at the standard rate
SLRA: PORTA Slew Rate Control bit
1 = All outputs on PORTA slew at a limited rate
0 = All outputs on PORTA slew at the standard rate
U-0
SLRCON: SLEW RATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
SLRE
R/W-1
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SLRD
R/W-1
(2)
(1)
R/W-1
SLRC
 2010 Microchip Technology Inc.
x = Bit is unknown
R/W-1
SLRB
R/W-1
SLRA
bit 0

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