PIC18F44K20-E/MV Microchip Technology, PIC18F44K20-E/MV Datasheet - Page 297

16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU

PIC18F44K20-E/MV

Manufacturer Part Number
PIC18F44K20-E/MV
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F44K20-E/MV

Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
22.5
In many applications, the ability to detect a drop below,
or rise above, a particular threshold is desirable. For
example, the HLVD module could be periodically
enabled to detect Universal Serial Bus (USB) attach or
detach. This assumes the device is powered by a lower
voltage source than the USB when detached. An attach
would indicate a high-voltage detect from, for example,
3.3V to 5V (the voltage on USB) and vice versa for a
detach. This feature could save a design a few extra
components and an attach signal (input pin).
For general battery applications, Figure 22-4 shows a
possible voltage curve. Over time, the device voltage
decreases. When the device voltage reaches voltage
V
The interrupt could cause the execution of an ISR,
which would allow the application to perform
“housekeeping tasks” and perform a controlled
shutdown before the device voltage exits the valid
operating range at T
application a time window, represented by the
difference between T
TABLE 22-1:
 2010 Microchip Technology Inc.
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
A
, the HLVD logic generates an interrupt at time T
Name
Applications
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
B
A
. The HLVD, thus, would give the
and T
B
, to safely exit.
Bit 6
C1IF
C1IE
C1IP
IRVST
C2IE
C2IP
Bit 5
C2IF
HLVDEN
INT0IE
A
EEIE
EEIP
Bit 4
EEIF
.
HLVDL3
FIGURE 22-4:
PIC18F2XK20/4XK20
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
V
V
A
B
Legend:
HLVDL2
TMR0IF
HLVDIE
HLVDIP
HLVDIF
Bit 2
V
V
A
B
= HLVD trip point
= Minimum valid device
HLVDL1
TMR3IF
TMR3IE
TMR3IP
TYPICAL LOW-VOLTAGE
DETECT APPLICATION
INT0IF
operating voltage
Bit 1
Time
T
A
HLVDL0
CCP2IF
CCP2IE
CCP2IP
DS41303G-page 297
RBIF
Bit 0
T
B
on Page
Values
Reset
60
59
62
62
62

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