PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 72

• Manufacturer Part Number: PIC16F1937-E/MV
• Description: 14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-E/MV

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC16(L)F1934/6/7
5.2.2
The device may be configured to use the internal oscil-
lator block as the system clock by performing one of the
following actions:
• Program the FOSC<2:0> bits in Configuration
• Write the SCS<1:0> bits in the OSCCON register
In INTOSC mode, OSC1/CLKIN is available for general
purpose I/O. OSC2/CLKOUT is available for general
purpose I/O or CLKOUT.
The function of the OSC2/CLKOUT pin is determined
by the state of the CLKOUTEN bit in Configuration
Word 1.
The internal oscillator block has two independent
oscillators and a dedicated Phase-Lock Loop, HFPLL
that can produce one of three internal system clock
sources.
1.
2.
3.
DS41364E-page 72
Word 1 to select the INTOSC clock source, which
will be used as the default system clock upon a
device Reset.
to switch the system clock source to the internal
oscillator during run-time. See
“Clock
The
Oscillator) is factory calibrated and operates at
16 MHz. The HFINTOSC source is generated
from the 500 kHz MFINTOSC source and the
dedicated Phase-Lock Loop, HFPLL. The
frequency
user-adjusted via software using the OSCTUNE
register
The MFINTOSC (Medium-Frequency Internal
Oscillator) is factory calibrated and operates at
500 kHz. The frequency of the MFINTOSC can
be
OSCTUNE register
The
Oscillator) is uncalibrated and operates at
31 kHz.
user-adjusted
Switching”for more information.
HFINTOSC
LFINTOSC
INTERNAL CLOCK SOURCES
(Register
of
the
5-3).
(Register
(High-Frequency
(Low-Frequency
via software using the
HFINTOSC
Section 5.3
5-3).
can
Internal
Internal
be
5.2.2.1
The High-Frequency Internal Oscillator (HFINTOSC) is
a factory calibrated 16 MHz internal clock source. The
frequency of the HFINTOSC can be altered via
software using the OSCTUNE register
The output of the HFINTOSC connects to a postscaler
and multiplexer (see
frequencies derived from the HFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See
Oscillator Clock Switch Timing”
The HFINTOSC is enabled by:
• Configure the IRCF<3:0> bits of the OSCCON
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
The High-Frequency Internal Oscillator Ready bit
(HFIOFR) of the OSCSTAT register indicates when the
HFINTOSC is running and can be utilized.
The High-Frequency Internal Oscillator Status Locked
bit (HFIOFL) of the OSCSTAT register indicates when
the HFINTOSC is running within 2% of its final value.
The High-Frequency Internal Oscillator Status Stable
bit (HFIOFS) of the OSCSTAT register indicates when
the HFINTOSC is running within 0.5% of its final value.
5.2.2.2
The
(MFINTOSC) is a factory calibrated 500 kHz internal
clock source. The frequency of the MFINTOSC can be
altered via software using the OSCTUNE register
(Register
The output of the MFINTOSC connects to a postscaler
and multiplexer (see
frequencies derived from the MFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See
Oscillator Clock Switch Timing”
The MFINTOSC is enabled by:
• Configure the IRCF<3:0> bits of the OSCCON
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
The Medium-Frequency Internal Oscillator Ready bit
(MFIOFR) of the OSCSTAT register indicates when the
MFINTOSC is running and can be utilized.
register for the desired HF frequency, and
OSCCON register to ‘1x’.
register for the desired HF frequency, and
OSCCON register to ‘1x’
Medium-Frequency
5-3).
HFINTOSC
MFINTOSC
 2008-2011 Microchip Technology Inc.
Figure
Figure
Section 5.2.2.7 “Internal
Section 5.2.2.7 “Internal
5-1). One of nine
5-1). One of nine
Internal
for more information.
for more information.
(Register
Oscillator
5-3).