PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 42

• Manufacturer Part Number: PIC16F1937-E/MV
• Description: 14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-E/MV

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC16(L)F1934/6/7
TABLE 3-12:
DS41364E-page 42
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
Legend:
Note
Address
Bank 3
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
(1, 2)
(2)
1:
2:
3:
4:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
ANSELA
ANSELB
—
ANSELD
ANSELE
EEADRL
EEADRH
EEDATL
EEDATH
EECON1
EECON2
—
—
RCREG
TXREG
SPBRGL
SPBRGH
RCSTA
TXSTA
BAUDCON
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
These registers/bits are not implemented on PIC16(L)F1936 devices, read as ‘0’.
Unimplemented, read as ‘1’.
Name
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
EEPROM / Program Memory Address Register Low Byte
EEPROM / Program Memory Read Data Register Low Byte
EEPROM control register 2
Unimplemented
Unimplemented
USART Receive Data Register
USART Transmit Data Register
ABDOVF
EEPGD
ANSD7
CSRC
SPEN
Bit 7
GIE
—
—
—
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
EEPROM / Program Memory Address Register High Byte
ANSD6
RCIDL
CFGS
PEIE
Bit 6
RX9
TX9
—
—
—
—
—
—
EEPROM / Program Memory Read Data Register High Byte
TMR0IE
ANSD5
ANSA5
ANSB5
SREN
LWLO
TXEN
Bit 5
—
—
—
—
ANSA4
ANSB4
ANSD4
CREN
SYNC
FREE
SCKP
INTE
Bit 4
TO
—
BRG<15:8>
BRG<7:0>
WRERR
ADDEN
SENDB
ANSA3
ANSB3
ANSD3
BRG16
IOCIE
Bit 3
PD
—
BSR<4:0>
TMR0IF
ANSD2
ANSA2
ANSB2
ANSE2
WREN
BRGH
FERR
Bit 2
—
Z
 2008-2011 Microchip Technology Inc.
ANSA1
ANSB1
ANSD1
ANSE1
OERR
TRMT
INTF
WUE
Bit 1
WR
DC
ANSA0
ANSB0
ANSD0
ANSE0
ABDEN
IOCIF
RX9D
TX9D
Bit 0
RD
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
--11 1111 --11 1111
--11 1111 --11 1111
1111 1111 1111 1111
---- -111 ---- -111
0000 0000 0000 0000
-000 0000 -000 0000
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
0000 x000 0000 q000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 000x 0000 000x
0000 0010 0000 0010
01-0 0-00 01-0 0-00
POR, BOR
Value on
—
—
—
Value on all
Resets
other
—
—
—