PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 41

14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE

PIC16F1937-E/MV

Manufacturer Part Number
PIC16F1937-E/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1937-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
TABLE 3-12:
 2008-2011 Microchip Technology Inc.
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
Legend:
Note
Address
Bank 2
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(1, 2)
(2)
1:
2:
3:
4:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
LATA
LATB
LATC
LATD
LATE
CM1CON0
CM1CON1
CM2CON0
CM2CON1
CMOUT
BORCON
FVRCON
DACCON0
DACCON1
SRCON0
SRCON1
APFCON
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
These registers/bits are not implemented on PIC16(L)F1936 devices, read as ‘0’.
Unimplemented, read as ‘1’.
Name
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
PORTA Data Latch
PORTB Data Latch
PORTC Data Latch
PORTD Data Latch
Unimplemented
Unimplemented
Unimplemented
SBOREN
C1INTP
C2INTP
DACEN
FVREN
SRLEN
SRSPE
C1ON
C2ON
Bit 7
GIE
---
Write Buffer for the upper 7 bits of the Program Counter
CCP3SEL
FVRRDY
SRSCKE
DACLPS
SRCLK2
C1INTN
C2INTN
C1OUT
C2OUT
Bit 6
PEIE
---
SRSC2E
C1PCH1
C2PCH1
SRCLK1
T1GSEL
TMR0IE
DACOE
C1OE
C2OE
TSEN
Bit 5
---
C1PCH0
C2PCH0
SRSC1E
SRCLK0
P2BSEL
TSRNG
C1POL
C2POL
Bit 4
INTE
TO
---
CDAFVR1
SRNQSEL
SRQEN
SRRPE
IOCIE
Bit 3
PD
DACPSS<1:0>
PIC16(L)F1934/6/7
DACR<4:0>
BSR<4:0>
C2OUTSEL
CDAFVR0
SRNQEN
SRRCKE
LATE2
TMR0IF
C1SP
C2SP
Bit 2
Z
(3)
MC2OUT
SRRC2E
LATE1
C1HYS
C2HYS
SSSEL
SRPS
Bit 1
INTF
DC
---
C1NCH<1:0>
C2NCH<1:0>
ADFVR<1:0>
(3)
CCP2SEL -000 0000 -000 0000
BORRDY 1--- ---q u--- ---u
MC1OUT ---- --00 ---- --00
DACNSS 000- 00-0 000- 00-0
LATE0
C1SYNC 0000 -100 0000 -100
C2SYNC 0000 -100 0000 -100
SRRC1E 0000 0000 0000 0000
SRPR
IOCIF
Bit 0
C
(3)
DS41364E-page 41
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---- -xxx ---- -uuu
0000 --00 0000 --00
0000 --00 0000 --00
0q00 0000 0q00 0000
---0 0000 ---0 0000
0000 0000 0000 0000
POR, BOR
Value on
Value on all
Resets
other

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