PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 319

14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE

PIC16F1937-E/MV

Manufacturer Part Number
PIC16F1937-E/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1937-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
26.0
The Capacitive Sensing (CPS) module allows for an
interaction with an end user without a mechanical
interface. In a typical application, the CPS module is
attached to a pad on a Printed Circuit Board (PCB),
which is electrically isolated from the end user. When the
end user places their finger over the PCB pad, a
capacitive load is added, causing a frequency shift in the
CPS module. The CPS module requires software and at
least one timer resource to determine the change in
frequency. Key features of this module include:
• Analog MUX for monitoring multiple inputs
• Capacitive sensing oscillator
• Multiple power ranges
• Multiple timer resources
• Software control
• Operation during Sleep
FIGURE 26-1:
 2008-2011 Microchip Technology Inc.
CPS10
CPS11
CPS12
CPS13
CPS14
CPS15
CPS8
CPS9
Note 1:
CPS0
CPS1
CPS2
CPS3
CPS4
CPS5
CPS6
CPS7
CAPACITIVE SENSING (CPS)
MODULE
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
2:
3:
Reference CPSCON1 register
CPSCH3 is not implemented on PIC16(L)F1936.
If CPSON = 0, disabling capacitive sensing, no channel is selected.
CAPACITIVE SENSING BLOCK DIAGRAM
CPSON
CPSCH<3:0>
(3)
Capacitive
Oscillator
CPSOSC
Sensing
(2)
CPSRNG<1:0>
(Register
CPSON
26-2) for channels implemented on each device.
T0CKI
T0XCS
CPSOUT
CPSCLK
0
1
F
OSC
SYNCC1OUT
SYNCC2OUT
T1GSEL<1:0>
PIC16(L)F1934/6/7
T1CS<1:0>
/4
T1OSC/
F
F
T1G
OSC
T1CKI
OSC
0
1
/4
TMR0CS
Timer0 Module
TMR0
Timer1 Module
Control Logic
Timer1 Gate
EN
TMR1H:TMR1L
Overflow
DS41364E-page 319
TMR0IF
Set

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