28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 93

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28478G-18

Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of 28478G-18

Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
5.2.2
Channel Group Descriptors contain all information needed to configure one channel group and the associated 32
logical channels, while maintaining pointers to buffer descriptors for each channel and direction. The contents of
the Channel Group Descriptor are listed in
5.2.2.1
The Group Base Pointer (GBASE) register per channel group within the host interface contains a 2 kB pointer
aligned to a corresponding Channel Group Descriptor in shared memory, as described in
Table 5-8.
5.2.2.2
The Service Request is a register per channel group within the host interface containing a bit field where
instructions are written to MUSYCC by the host. The following instructions are supported:
A service request is issued to a specific channel group within MUSYCC. The channel group then acknowledges by
sending a service request acknowledge interrupt descriptor back to the host.
The soft-chip reset service request is the only service request not acknowledged by MUSYCC.
Issuing multiple service requests to the same channel group successively without first receiving acknowledgments
from each request may cause the host to lose track of which service request has been acknowledged, because
MUSYCC cannot uniquely acknowledge service requests for the same channel group. In addition, issuing multiple
simultaneous requests to the same channel group causes indeterminate results within the channel group. To
prevent these problems, the host software must wait for a Service Request Acknowledgement (SACK) after issuing
any service request except for the soft chip reset request. The soft chip reset request does not issue an
acknowledgement, but this request is guaranteed to be executed within two line clock periods.
Issuing a single service request to each supported channel group simultaneously is supported, because MUSYCC
acknowledges each one uniquely with the Group ID bit field.
the service request descriptor.
28478-DSH-002-E
Field
31:11
10:0
Bit
Perform device reset and initialization
Perform channel group reset and initialization
Configure a channel
Read specific descriptors from within a Channel Group Descriptor
Activate a channel
Deactivate a channel
Jump (re)activate a channel
No-operation command
GBASEx[20:0]
GBASEx[10:0]
Group Base Pointer
Name
Channel Group Level Descriptors
Group Base Pointer
Service Request
Preliminary Information / Mindspeed Proprietary and Confidential
Value
0
Mindspeed Technologies
These 21 bits are appended with 11 0s to form a 2 k block-aligned 32-bit address pointing to the
first dword of the channel group structure for Channel Group x.
These 11 bits appended to GBASE ensure 2 kB block alignment.
Table 5-2, Group Structure Memory
Table 5-9
®
lists the bit fields and their descriptions of
Description
Map.
Memory Organization
Table
5-8.
80

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