28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 54

• Manufacturer Part Number: 28478G-18
• Description: Multichannel Synchronous Communications Controller 208-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of 28478G-18

• Package: 208BGA
• Maximum Data Rate: 32768 Kbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 250 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V

Register 4, Address 10h
Table 2-14.
Register 5–14, Addresses 14h–38h
Table 2-15.
Register 15, Address 3Ch
Table 2-16.
28478-DSH-002-E
31:0
31:16
15:8
7:0
FOOTNOTE:
FOOTNOTE:
Field
Field
Field
31:20
19:4
Bit
2:1
Bit
Bit
3
0
EBUS—Function 1
An active-low signal is denoted by a trailing asterisk (*).
Reserved
Reserved
Interrupt Pin
Interrupt Line
An active-low signal is denoted by a trailing asterisk (*).
Base Address Register
Register 4, Address 10h
Registers 5 through 14–Addresses 14h through 38h
Register 15, Address 3Ch
Name
Name
Name
Preliminary Information / Mindspeed Proprietary and Confidential
Mindspeed Technologies
Reset
Value
Reset
Value
Reset
Value
02h
0
0
0
0
0
0
0
0
RO
RO
RW
Type
Type
Type
RW
RO
RO
RO
RO
RO
Allows for 1 MB bounded PCI bus address space to be blocked off as
MUSYCC expansion bus space. MUSYCC responds as a PCI slave with
DEVSEL* to all memory cycles whose non-zero address bits 31:20 match
the value of bits 31:20 of this register, with memory space enabled in
Function 1 Register 1, memory space bit field.
Reads to addresses within this space that are not implemented. Reads
back 0; writes have no effect.
PCI cycles to this space will be mapped to read or write cycles on the
expansion bus.
When appended to bits 31:20, specifies a 1 MB bound memory space. 1
MB is the only size of address space that a MUSYCC function can be
assigned.
Expansion bus memory space is not prefetchable.
Means MUSYCC expansion bus space can be located anywhere in 32-bit
address space.
Means this base register is a memory space base register, as opposed to
I/O mapped.
Unused.
Unused.
Defines which PCI interrupt pin Function 1 uses. 02h means MUSYCC
uses pin INTB* for interrupts sourced by devices connected to EBUS.
Communicates interrupt line routing. System initialization software writes
a value to this register indicating which host interrupt controller input is
connected to MUSYCC’s INTB* pin.
®
Description
Description
Description
Host Interface
41