CY8C3446PVI-076 Cypress Semiconductor Corp, CY8C3446PVI-076 Datasheet - Page 89

• Manufacturer Part Number: CY8C3446PVI-076
• Description: PSOC3
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C34xxr

Specifications of CY8C3446PVI-076

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 50MHz
• Number Of I /o: 25
• Eeprom Size: 2K x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 2x12b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, LCD, POR, PWM, WDT
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART, USB
• Core Size: 8-Bit
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: SSOP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C34
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 1.71 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 25
• Eeprom Memory Size: 2KB
• Ram Memory Size: 8KB
• Cpu Speed: 50MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.9.6 Phase-Locked Loop
Table 11-83. PLL DC Specifications
Table 11-84. PLL AC Specifications
Document Number: 001-53304 Rev. *G
I
Fpllin
Fpllout
Jperiod-rms Jitter (rms)
Notes
Parameter
DD
Parameter
53. This specification is guaranteed by testing the PLL across the specified range using the IMO as the source for the PLL.
54. PLL input divider, Q, must be set so that the input frequency is divided down to the intermediate frequency range. Value for Q ranges from 1 to 16.
55. Based on device characterization (Not production tested).
PLL operating current
PLL input frequency
PLL intermediate frequency
PLL output frequency
Lock time at startup
PLL output duty cycle
[55]
Description
Description
[53]
[53]
[54]
PRELIMINARY
In = 3 MHz, Out = 24 MHz
–
Output of prescaler
–
–
–
All PLL output frequencies
Conditions
Conditions
PSoC
®
3: CY8C34 Family Datasheet
Min
Min
24
45
–
1
1
–
–
Typ
200
Typ
–
–
–
–
–
–
Max
Max
250
250
48
50
55
–
3
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Units
Units
MHz
MHz
MHz
µA
µs
ps
%
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