CY8C3244LTI-130 Cypress Semiconductor Corp, CY8C3244LTI-130 Datasheet - Page 118

• Manufacturer Part Number: CY8C3244LTI-130
• Description: PSOC3
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C32xxr

Specifications of CY8C3244LTI-130

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 50MHz
• Number Of I /o: 38
• Eeprom Size: 512 x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Program Memory Size: 16KB (16K x 8)
• Data Converters: A/D 2x12b, D/A 1x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: CY8C32
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 1.71 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 38
• Eeprom Memory Size: 0.5KB
• Ram Memory Size: 2KB
• Cpu Speed: 50MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document Number: 001-56955 Rev. *K
Description Title: PSoC
Document Number: 001-56955
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3: CY8C32 Family Data Sheet Programmable System-on-Chip (PSoC
MKEA
MKEA
MKEA
MKEA
MKEA
SHEA
Replaced V
in USBIO section of Electrical Specifications.
Added Table 13-2 (Package MSL)
Modified Tstorag condition and changed max spec to 100
Added bullet (Pass) under ALU (section 7.2.2.2)
Added figures for kHzECO and MHzECO in the External Oscillator section
Updated Figure 6-1(Clocking Subsystem diagram)
Removed CPUCLK_DIV in table 5-2, Deleted Clock Divider SFR subsection
Updated PSoC Creator Framework image
Updated SIO DC Specifications (V
Updated bullets in Clocking System and Clocking Distribution sections
Updated Figure 8-2
Updated Table 11-10
Updated PCB Layout and Schematic, updated as per MTRB review comments
Updated Table 6-3 (power changed to current)
In 32kHZ EC DC Specifications table, changed I
In IMO DC Specifications table, updated Supply Current values
Updated GPIO DC Specs table
Modified to support a maximum 50MHz CPU speed
Minor ECN to post datasheet to external website
Added USBIO 22 ohm DP and DM resistors to Simplified Block Diagram
Added to Table 6-6 a footnote and references to same.
Added sentences to the resistive pull-up and pull-down description bullets.
Added sentence to Section 6.4.11, Adjustable Output Level.
Updated section 5.5 External Memory Interface
Updated Table 11-73 JTAG Interface AC Specifications
Updated Table 11-74 SWD Interface AC Specifications
Updated
Updated
Updated
Updated delta-sigma tables and graphs.
Updated Flash AC specs
Formatted table 11.2.
Updated interrupt controller table
Updated transimpedance amplifier section
Updated SIO DC specs table
Updated Voltage Monitors DC Specifications table
Updated LCD Direct Drive DC specs table
Updated ESD
Updated IDAC and VDAC sections
Removed ESO parts from ordering information
Changed USBIO pins from NC to DNU and removed redundant USBIO pin
description notes
Updated POR with brown out DC and AC specs
Updated 32 kHz External Crystal DC Specifications
Updated XRES IO specs
Updated Inductive boost regulator section
Delta sigma ADC spec updates
Updated comparator section
Removed buzz mode from Power Mode Transition diagram
Updated conditions for flash data retention time.
Updated 100-pin TQFP package spec.
Updated EEPROM AC specifications.
“Current Digital-to-analog Converter (IDAC)”
“Voltage Digital to Analog Converter (VDAC)”
Table 11-2, “DC Specifications,”
DDIO
HBM
with V
value.
DDD
in USBIO diagram and specification tables, added text
IH
and V
PSoC
on page 65
IL
parameters)
®
CC
3: CY8C32 Family
®
Max to 0.25
)
on page 84
on page 89
Data Sheet
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