AD8192ACPZ-RL7 Analog Devices Inc, AD8192ACPZ-RL7 Datasheet - Page 6

• Manufacturer Part Number: AD8192ACPZ-RL7
• Description: IC,Telecom Switching Circuit,LLCC,56PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD8192ACPZ-RL7

• Applications: HDMI, DVI, Receivers
• Interface: I²C
• Voltage - Supply: 3.3V, 5V
• Package / Case: 56-LFCSP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD8192
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1, 10, 33, 42
2
3
4, 13, 30, 39, ePAD
5
6
7, 36
8
9
11
12
14
15, 21
16
17
18, 24
19
20
22
23
25
26
27
28
29
31
32
34
35
Mnemonic
AVCC
IN_A0
IP_A0
AVEE
IN_A1
IP_A1
VTTI
IN_A2
IP_A2
IN_A3
IP_A3
I2C_ADDR
DVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
RESET
I2C_SCL
I2C_SDA
IN_B0
IP_B0
IN_B1
IP_B1
NOTES
1. THE AD8192 LFCSP HAS AN EXPOSED PADDLE (ePAD) ON THE UNDERSIDE
OF THE PACKAGE WHICH AIDS IN HEAT DISSIPATION. THE ePAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER TO
MEET THERMAL SPECIFICATIONS.
I2C _ ADDR
Type
Power
HS I/O
HS I/O
Power
HS I/O
HS I/O
Power
HS I/O
HS I/O
HS I/O
HS I/O
Control
Power
HS I/O
HS I/O
Power
HS I/O
HS I/O
HS I/O
HS I/O
HS I/O
HS I/O
Control
Control
Control
HS I/O
HS I/O
HS I/O
HS I/O
AVCC
IN _ A0
IN _ A1
IN _ A2
AVCC
IN _ A3
IP _ A0
AVEE
IP _ A1
IP _ A2
IP _ A3
AVEE
VTTI
1
10
11
12
13
14
1
2
4
5
6
7
8
9
3
Figure 3. Pin Configuration
PIN 1
INDICATOR
Description
Positive Analog Supply. 3.3 V nominal.
High Speed Input Complement.
High Speed Input.
Negative Analog Supply. 0 V nominal.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
I
Positive Digital Power Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AVCC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Configuration Registers Reset. Normally pulled to AVCC.
I
I
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
2
2
2
C Address LSB.
C Clock.
C Data.
Rev. 0 | Page 6 of 28
(Not to Scale)
AD8192
TOP VIEW
42
41
40
39
38
37
36
35
34
33
32
31
30
29
AVCC
IP _ B3
IN _ B3
AVEE
IP _ B2
IN _ B2
VTTI
IP _ B1
IN _ B1
AVCC
IP _ B0
IN _ B0
AVEE
I2C _ SDA