CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 51

• Manufacturer Part Number: CDB42L52
• Description: Eval Bd LP Codec W/Class D Spkr Driver
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L52

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L52
• Primary Attributes: 4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
• Secondary Attributes: GUI, I2C, SPI, USB Interfaces
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS42L52
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1505

DS680F1
6.11.4 Invert ADC Signal Polarity
6.11.5 ADC Mute
6.12
6.12.1 Headphone Analog Gain
6.12.2 Playback Volume Setting B=A
HPGAIN2
7
Playback Control 1 (Address 0Dh)
Configures the polarity of the ADC signal.
Configures a digital mute on ADC channel x.
Note:
Selects the gain multiplier for the headphone/line outputs.
Note:
Characteristics” on page
Configures independent or ganged volume control of all playback channels.
INV_ADCx
0
1
ADCxMUTE
0
1
HPGAIN[2:0]
000
001
010
011
100
101
110
111
PLYBCKB=A
0
1
HPGAIN1
When the ADCxMUTE bit is enabled, the PGA will automatically apply 6 dB of attenuation.
Refer to
6
ADC Signal Polarity
Not Inverted
Inverted
ADC Mute
Disabled
Enabled
Headphone/Line Gain Setting (G)
0.3959
0.4571
0.5111
0.6047
0.7099
0.8399
1.000
1.1430
Single Volume Control
Disabled
Enabled
“Line Output Voltage Level Characteristics” on page 20
HPGAIN0
5
19.
PLYBCKB=A
4
Affected Volume Controls
HPxMUTE
AMIXxVOL[7:0]
PMIXxVOL[7:0]
MSTxVOL[7:0]
HPxVOL[7:0]
5/13/08
INV_PCMB
(“Playback Control 2 (Address 0Fh)” on page
3
(“Headphone Volume Control” on page
(“Master Volume Control” on page
(“ADC Mixer Channel x Volume” on page
(“PCM Mixer Channel x Volume” on page
INV_PCMA
2
and
MSTBMUTE
“Headphone Output Power
1
63),
63)
54),
58),
58),
CS42L52
MSTAMUTE
0
51