CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 20

Eval Bd LP Codec W/Class D Spkr Driver

CDB42L52

Manufacturer Part Number
CDB42L52
Description
Eval Bd LP Codec W/Class D Spkr Driver
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L52

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L52
Primary Attributes
4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
Secondary Attributes
GUI, I2C, SPI, USB Interfaces
Description/function
Audio CODECs
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42L52
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1505
20
LINE OUTPUT VOLTAGE LEVEL CHARACTERISTICS
Test conditions (unless otherwise specified): Input test signal is a full-scale 997 Hz sine wave; measurement bandwidth is 20 Hz
to 20 kHz; Sample Frequency = 48 kHz; Test load R
page 37
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE
Frequency Response 10 Hz to 20 kHz
Passband
StopBand
StopBand Attenuation
Group Delay
De-emphasis Error
AOUTx Voltage Into R
HP_GAIN[2:0]
011 (default)
000
001
010
100
101
110
111
written on power up.
12. Response is clock dependent and will scale with Fs. Note that the response plots
13. Measurement Bandwidth is from Stopband to 3 Fs.
page
Parameters
78) have been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs.
Gain (G)
Analog
0.6047
0.3959
0.4571
0.7099
0.8399
1.0000
1.1430
0.5111
(Note 13)
L
= 10 k
Parameters
1.8 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
1.8 V
2.5 V
VHP
(Note 12)
Min
1.95
L
-
-
-
-
-
-
-
-
-
-
-
-
-
-
= 10 kΩ, C
(See
5/13/08
VA = 2.5V
to -0.05 dB corner
Typ
1.34
1.34
1.55
1.55
1.73
1.73
2.05
2.05
2.41
2.41
2.85
2.85
3.39
3.39
(Note 11)
3.88
L
to -3 dB corner
= 10 pF (see
Fs = 44.1 kHz
Fs = 32 kHz
Fs = 48 kHz
Max
2.15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Figure
0.5465
-0.01
Min
50
0
0
-
-
-
-
Min
2);
1.41
-
-
-
-
-
-
-
-
-
-
-
-
-
-
“Required Initialization Settings” on
VA = 1.8V
Typ
9/Fs
-
-
-
-
-
-
-
-
2.05
Typ
0.97
0.97
1.12
1.12
1.25
1.25
1.48
1.48
1.73
1.73
2.05
2.44
2.44
2.79
2.79
(Figures 30
+0.05/-0.25
-0.2/-0.4
+1.5/+0
1.55
0.4780
0.4996
Max
+0.08
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
CS42L52
-
-
-
and
DS680F1
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
33 on
Unit
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
pp
dB
dB
dB
dB
dB
Fs
Fs
Fs
s

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