CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 36

• Manufacturer Part Number: CDB42L52
• Description: Eval Bd LP Codec W/Class D Spkr Driver
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L52

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L52
• Primary Attributes: 4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
• Secondary Attributes: GUI, I2C, SPI, USB Interfaces
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS42L52
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1505

36
4.7
4.7.1
LRCK
SCLK
SDIN
LRCK
SCLK
SDOUT
SDIN
SDOUT
LRCK
SCLK
SDIN
LRCK
SCLK
SDIN
Digital Interface Formats
The serial port operates in standard I²S, Left-justified, Right-justified (DAC only), or DSP Mode digital inter-
face formats with varying bit depths from 16 to 24. Data is clocked out of the ADC or into the DAC on the
rising edge of SCLK.
DSP Mode
In DSP Mode, the LRCK acts as a frame sync for 2 data-packed words (left and right channel) input on
SDIN and output on SDOUT. The MSB is input/output on the first SCLK rising edge after the frame sync
rising edge. The right channel immediately follows the left channel.
M S B
L S B
M S B
M S B
AOUTA / AINxA
AOUTA / AINxA
L eft C h a n n el
L e f t C h a n n e l
L eft C h a n n el
Audio Word Length (AWL)
Figure 18. Right-Justified Format (DAC only)
M S B
L eft C h a n n el
HP/LINE OUTA
Audio W ord Length (AW L)
Figure 17. Left-Justified Format
Figure 19. DSP Mode Format)
AO UTL
Figure 16. I²S Format
L S B
L S B
5/13/08
L S B
M S B
L S B
1/fs
M S B
M S B
AOUTB / AINxB
AOUTB / AINxB
R ig ht C h a n n el
R ig ht C h a n n el
R ig ht C h a n n el
HP/LINE OUTB
R i g h t C h a n n e l
M S B
AO UTR
L S B
L S B
CS42L52
L S B M S B
MSB
DS680F1
L S B
MSB