IPR-FFT Altera, IPR-FFT Datasheet - Page 47

IP CORE Renewal Of IP-FFT

IPR-FFT

Manufacturer Part Number
IPR-FFT
Description
IP CORE Renewal Of IP-FFT
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-FFT

Software Application
IP CORE, DSP Filters And Transforms
Supported Families
Arria GX, Cyclone, HardCopy, Stratix
Features
Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
Fast Fourier Transform Processor
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Chapter 3: Functional Description
Parameters
Burst
Figure 3–14. FFT Burst Data Flow Architecture Simulation Waveform
Parameters
© December 2010 Altera Corporation
source_ready
source_imag
source_valid
source_real
source_eop
source_exp
source_sop
sink_ready
sink_imag
sink_valid
sink_sop
sink_eop
sink_real
f
reset_n
inverse
clk
The burst I/O data flow architecture operates similarly to the buffered burst
architecture, except that the burst architecture requires even lower memory resources
for a given parameterization at the expense of reduced average throughput.
Figure 3–14
source_valid and sink_ready indicate, to the system data sources and slave
sinks either side of the FFT, when the FFT can accept a new block of data and when a
valid output block is available on the FFT output.
In a burst I/O data flow architecture, the core can process a single input block only.
There is a small FIFO buffer at the sink of the block and sink_ready is not
deasserted until this FIFO buffer is full. Thus you can provide a small number of
additional input samples associated with the subsequent input block. It is not
mandatory to provide data to the FFT during sink_ready cycles. The burst
architecture can load the rest of the subsequent FFT frame only when the previous
transform has been fully unloaded.
For information about enabling the buffered burst FFT, refer to
Streaming FFT” on page
Table 3–3
shows the FFT MegaCore function’s parameters.
shows the simulation results for the burst architecture. Again, the signals
EXP0
3–8.
EXP1
-47729
-47729
271
271
FFT MegaCore Function User Guide
“Enabling the
EXP2
3–13

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