IPR-FFT Altera, IPR-FFT Datasheet - Page 29

• Manufacturer Part Number: IPR-FFT
• Description: IP CORE Renewal Of IP-FFT
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FFT

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Features: Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Fast Fourier Transform Processor
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 2: Getting Started
MegaWizard Plug-In Manager Flow
Table 2–1. Generated Files (Part 1 of 2)
© December 2010 Altera Corporation
imag_input.txt
real_input.txt
<variation name>.bsf
<variation name>.cmp
<variation name>.html
<variation name>.qip
<variation name>.vo or .vho
<variation name>.vhd, or .v
Filename
Figure 2–8. Generation Report
Table 2–1
directory. The names and types of files specified in the IP Toolbench report vary
based on whether you created your design with VHDL or Verilog HDL
describes the generated files and other files that may be in your project
The text file contains input imaginary component random data. This file is read by
the generated VHDL or Verilog HDL MATLAB testbenches.
Test file containing real component random data. This file is read by the generated
VHDL or Verilog HDL and MATLAB testbenches.
Quartus II symbol file for the MegaCore function variation. You can use this file in
the Quartus II block diagram editor.
A VHDL component declaration file for the MegaCore function variation. Add the
contents of this file to any VHDL architecture that instantiates the MegaCore
function.
A MegaCore function report file in hypertext markup language format.
A single Quartus II IP file is generated that contains all of the assignments and
other information required to process your MegaCore function variation in the
Quartus II compiler. You are prompted to add this file to the current Quartus II
project when you exit from the MegaWizard.
VHDL or Verilog HDL IP functional simulation model.
A MegaCore function variation file, which defines a VHDL or Verilog HDL top-level
description of the custom MegaCore function. Instantiate the entity defined by
this file inside of your design. Include this file when compiling your design in the
Quartus II software.
(Note 1)
&
(2)
Description
FFT MegaCore Function User Guide
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