IPR-FFT Altera, IPR-FFT Datasheet - Page 46

• Manufacturer Part Number: IPR-FFT
• Description: IP CORE Renewal Of IP-FFT
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FFT

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Features: Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Fast Fourier Transform Processor
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

3–12
Figure 3–12. FFT Buffered Burst Data Flow Architecture Input Flow Control
Figure 3–13. FFT Buffered Burst Data Flow Architecture Output Flow Control
FFT MegaCore Function User Guide
master_source_valid
source_ready
source_imag
source_realt
source_eop
source_exp
source_sop
f
1
sink_ready
sink_imag
sink_valid
sink_sop
sink_real
reset_n
inverse
clk
When the input block is loaded, the FFT function begins computing the transform on
the stored input block. The sink_ready signal is held high as you can transfer the
first few samples of the subsequent frame into the small FIFO at the input. If this FIFO
is filled, the core deasserts the sink_ready signal. It is not mandatory to transfer
samples during sink_ready cycles.
Following the interval of time where the FFT processor reads the input samples from
an internal input buffer, it re-asserts sink_ready indicating it is ready to read in the
next input block. The beginning of the subsequent input block should be demarcated
by the application of a pulse on sink_sop aligned in time with the first input sample
of the next block.
As in all data flow architectures, the logical level of inverse for a particular block is
registered by the FFT function at the time of the assertion of the start-of-packet signal,
sink_sop.
When the FFT has completed the transform of the input block, it asserts the
source_valid and outputs the complex transform domain data block in natural order
(Figure
Signals source_sop and source_eop indicate the start-of-packet and end-of-packet
for the output block data respectively
The sink_valid signal must be asserted for source_valid to be asserted (and a
valid data output). You must therefore leave sink_valid signal asserted at the end
of data transfers to extract the final frames of data from the FFT.
For information about enabling the buffered burst FFT, refer to
Streaming FFT” on page
clk
3–13).
x r (0)
x i (0)
3–8.
x r (1)
x i (1)
X r [0]
X i [0]
x r (2)
x i (2)
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X i [1]
Figure 3–12
(Figure
x r (3)
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x i (4)
x r (4)
X r [3]
X i [3]
3–11).
x r (5)
x i (5)
X r [4]
X i [4]
shows the input flow control.
x r (6)
x i (6)
X r [5]
X i [5]
EXP0
x r (7)
x i (7)
© December 2010 Altera Corporation
X i [6]
X r [6]
Chapter 3: Functional Description
x r (8)
x i (8)
“Enabling the
X r [7]
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I/O Data Flow Architectures
x r (9)
x i (9)
X r [8]
X i [8]
X i [9]
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X i [10]