IPR-FFT Altera, IPR-FFT Datasheet - Page 30

IP CORE Renewal Of IP-FFT

IPR-FFT

Manufacturer Part Number
IPR-FFT
Description
IP CORE Renewal Of IP-FFT
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-FFT

Software Application
IP CORE, DSP Filters And Transforms
Supported Families
Arria GX, Cyclone, HardCopy, Stratix
Features
Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
Fast Fourier Transform Processor
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
2–10
Table 2–1. Generated Files (Part 2 of 2)
Simulate the Design
Simulate in the MATLAB Software
FFT MegaCore Function User Guide
<variation name>_1n1024cos.hex,
<variation name>_2n1024cos.hex,
<variation name>_3n1024cos.hex
<variation name>_1n1024sin.hex,
<variation name>_2n1024sin.hex,
<variation name>_3n1024sin.hex
<variation name>_model.m
<variation name>_tb.m
<variation name>_syn.v or
<variation name>_syn.vhd
<variation name>_tb.v or
<variation name>_tb.vhd
<variation name>_nativelink.tcl
twr1_opt.hex, twi1_opt.hex,
twr2_opt.hex, twi2_opt.hex,
twr3_opt.hex, twi3_opt.hex,
twr4_opt.hex, twi4_opt.hex,
Notes to
(1) These files are variation dependent, some may be absent or their names may change.
(2) <variation name> is a prefix variation name supplied automatically by IP Toolbench.
Table
f
2–1:
Filename
2. After you review the generation report, click Exit to close IP Toolbench. Then click
Refer to the Quartus II Help for more information about the MegaWizard Plug-In
Manager.
You can now integrate your custom MegaCore function variation into your design
and simulate and compile.
This section describes the following simulation techniques:
This section discusses fixed-transform and variable streaming architecture
simulations.
Yes on the Quartus II IP Files prompt to add the .qip file describing your custom
MegaCore function to the current Quartus II project.
Simulate in the MATLAB Software
Simulate with IP Functional Simulation Models
Simulating in Third-Party Simulation Tools Using NativeLink
Intel hex-format ROM initialization files (not generated for variable streaming
FFT).
Intel hex-format ROM initialization files (not generated for variable streaming
FFT).
MATLAB m-file describing a MATLAB bit-accurate model.
MATLAB testbench.
A timing and resource netlist for use in some third-party synthesis tools.
Verilog HDL or VHDL testbench file.
Tcl Script that sets up NativeLink in the Quartus II software to natively simulate
the design using selected EDA tools. Refer to
Simulation Tools Using NativeLink” on page
Intel hex-format ROM initialization files (variable streaming FFT only).
(Note 1)
&
(2)
Description
2–12.
“Simulating in Third-Party
© December 2010 Altera Corporation
Chapter 2: Getting Started
Simulate the Design

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