PIC18C658-I/PT Microchip Technology, PIC18C658-I/PT Datasheet - Page 288

• Manufacturer Part Number: PIC18C658-I/PT
• Description: 32 KB OTP, 1536 RAM, 52 I/O 64 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658I/PT

PIC18CXX8
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30475A-page 288
MULLW
Before Instruction
After Instruction
Decode
WREG
PRODH
PRODL
WREG
PRODH
PRODL
Q1
literal ’k’
Multiply Literal with WREG
[ label ]
0
(WREG) x k
None
An unsigned multiplication is car-
ried out between the contents of
WREG and the 8-bit literal ’k’.
The 16-bit result is placed in
PRODH:PRODL register pair.
PRODH contains the high byte.
WREG is unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this opera-
tion. A zero result is possible but
not detected.
1
1
MULLW
Read
0000
Q2
=
=
=
=
=
=
k
255
0xE2
?
?
0xE2
0xAD
0x08
0xC4
MULLW
1101
Process
Data
Q3
PRODH:PRODL
kkkk
k
Advanced Information
registers
PRODH:
PRODL
Write
Q4
kkkk
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
MULWF
Before Instruction
After Instruction
Decode
WREG
REG
PRODH
PRODL
WREG
REG
PRODH
PRODL
Q1
register ’f’
Multiply WREG with f
[ label ]
0
a
(WREG) x (f)
None
An unsigned multiplication is car-
ried out between the contents of
WREG and the register file loca-
tion ’f’. The 16-bit result is stored
in the PRODH:PRODL register
pair. PRODH contains the high
byte.
Both WREG and ’f’ are
unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this opera-
tion. A zero result is possible but
not detected. If ’a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If ’a’ is
1, the Bank will be selected as
per the BSR value.
1
1
MULWF
Read
0000
Q2
=
=
=
=
=
=
=
=
f
[0,1]
2000 Microchip Technology Inc.
255
0xC4
0xB5
?
?
0xC4
0xB5
0x8A
0x94
REG
MULWF
001a
Process
Data
Q3
PRODH:PRODL
ffff
f [,a]
PRODH:
registers
PRODL
Write
Q4
ffff