PIC18C658-I/PT Microchip Technology, PIC18C658-I/PT Datasheet - Page 285

• Manufacturer Part Number: PIC18C658-I/PT
• Description: 32 KB OTP, 1536 RAM, 52 I/O 64 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658I/PT

Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
LFSR
2000 Microchip Technology Inc.
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
Load FSR
[ label ]
0
0
k
None
The 12-bit literal ’k’ is loaded into
the file select register pointed to
by ’f’
2
2
LFSR FSR2, 0x3AB
’k’ MSB
’k’ LSB
1110
1111
Q2
=
=
f
k
FSRf
2
4095
0x03
0xAB
LFSR f,k
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
Advanced Information
’k’ to FSRfL
Write literal
literal ’k’
MSB to
FSRfH
Write
Q4
k
kkkk
11
kkk
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
REG
WREG
N
Z
REG
WREG
N
Z
Q1
register ’f’
Move f
[ label ]
0
d
a
f
N,Z
The contents of register ’f’ is moved
to a destination dependent upon
the status of ’d’. If 'd' is 0, the result
is placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default). Location 'f' can be any-
where in the 256 byte Bank. If ’a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ’a’ is 1, the Bank will be selected
as per the BSR value.
1
1
MOVF
Read
0101
Q2
=
=
=
=
=
=
=
=
f
[0,1]
[0,1]
dest
PIC18CXX8
255
0x22
0xFF
?
?
0x22
0x22
0
0
REG, W
MOVF f [ ,d [,a] ]
00da
Process
Data
Q3
DS30475A-page 285
ffff
Write W
Q4
ffff