PIC18C658-I/PT Microchip Technology, PIC18C658-I/PT Datasheet - Page 24

• Manufacturer Part Number: PIC18C658-I/PT
• Description: 32 KB OTP, 1536 RAM, 52 I/O 64 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658I/PT

PIC18CXX8
2.5
A Phase Locked Loop circuit is provided as a pro-
grammable option for users that want to multiply the
frequency of the incoming crystal oscillator signal by 4.
For an input clock frequency of 10 MHz, the internal
clock frequency will be multiplied to 40 MHz. This is
useful for customers who are concerned with EMI due
to high frequency crystals.
FIGURE 2-5:
DS30475A-page 24
HS4 (PLL)
OSC2
OSC1
PLL BLOCK DIAGRAM
Crystal
Osc
F
IN
Comparator
F
OUT
Phase
Advanced Information
FOSC2:FOSC0 = ‘110’
Loop
Filter
The PLL can only be enabled when the oscillator con-
figuration bits are programmed for HS mode. If they
are programmed for any other mode, the PLL is not
enabled and the system clock will come directly from
OSC1.
The PLL is one of the modes of the FOSC2:FOSC0
configuration bits. The oscillator mode is specified dur-
ing device programming.
A PLL lock timer is used to ensure that the PLL has
locked before device execution starts. The PLL lock
timer has a time-out referred to as T
Divide by 4
VCO
 2000 Microchip Technology Inc.
PLL
.
SYSCLK