AGL125V2-CSG196 Actel, AGL125V2-CSG196 Datasheet - Page 15

• Manufacturer Part Number: AGL125V2-CSG196
• Description: FPGA - Field Programmable Gate Array 125K System Gates
• Manufacturer: Actel

Specifications of AGL125V2-CSG196

• Processor Series: AGL125
• Core: IP Core
• Maximum Operating Frequency: 526.32 MHz, 892.86 MHz
• Number Of Programmable I/os: 133
• Data Ram Size: 36864
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 125 K
• Package / Case: CSP-196
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2 – IGLOO DC and Switching Characteristics
General Specifications
Table 2-1 •
Symbol
VCC
VJTAG
VPUMP
VCCPLL
VCCI
VMV
VI
T
T
Notes:
1. The device should be operated within the limits specified by the datasheet. During transitions, the input signal may
2. For flash programming and retention, maximum limits refer to
3. VMV pins must be connected to the corresponding VCCI pins. See the "Pin Descriptions" chapter of the
STG
J
2
undershoot or overshoot according to the limits shown in
limits, refer to
Fabric User’s Guide
3
2
and
Operating Conditions
Stresses beyond those listed in
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings are stress ratings only; functional operation of the device at these or any
other conditions beyond those listed under the Recommended Operating Conditions specified in
Table 2-2 on page 2-2
Absolute Maximum Ratings
Table 2-2 on page
DC core supply voltage
JTAG DC voltage
Programming voltage
Analog power supply (PLL)
DC I/O buffer supply voltage
I/O input voltage
Storage Temperature
Junction Temperature
for further information.
Parameter
2-2.
is not implied.
Table 2-1
(when I/O hot-insertion mode is disabled)
–0.3 V to 3.6 V (when I/O hot insertion mode is enabled)
–0.3 V to (VCCI + 1 V) or 3.6 V, whichever voltage is lower
may cause permanent damage to the device.
R ev i si o n 1 8
Table 2-4 on page
Table 2-3 on page
–0.3 to 1.65
–0.3 to 3.75
–0.3 to 3.75
–0.3 to 1.65
–0.3 to 3.75
–65 to +150
Limits
2-3.
+125
2-2, and for recommended operating
IGLOO FPGA
Units
°C
°C
V
V
V
V
V
V
2 -1