A000047 Arduino, A000047 Datasheet - Page 189

MCU, MPU & DSP Development Tools Mega2560

A000047

Manufacturer Part Number
A000047
Description
MCU, MPU & DSP Development Tools Mega2560
Manufacturer
Arduino
Series
-r
Type
MCUr
Datasheets

Specifications of A000047

Processor To Be Evaluated
ATmega2560
Interface Type
USB, I2C, SPI
Dimensions
4 in x 2.1 in
Operating Supply Voltage
5 V
Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega2560
2549M–AVR–09/10
Table 19-7
rect PWM mode.
Table 19-7.
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 1:0 – WGM21:0: Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 19-8.
Notes:
Mode
COM2B1
0
1
2
3
4
5
6
7
0
0
1
1
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. MAX= 0xFF.
2. BOTTOM= 0x00.
WGM2
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
pare Match is ignored, but the set or clear is done at TOP. See
page 179
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM2B0
for more details.
WGM1
0
1
0
1
0
0
1
1
0
0
1
1
WGM0
Table
ATmega640/1280/1281/2560/2561
0
1
0
1
0
1
0
1
Clear OC2B on Compare Match when down-counting.
19-8. Modes of operation supported by the Timer/Counter
Set OC2B on Compare Match when down-counting.
Clear OC2B on Compare Match when up-counting.
Set OC2B on Compare Match when up-counting.
Timer/Counter
Normal port operation, OC2B disconnected.
PWM, Phase
PWM, Phase
Operation
Fast PWM
Fast PWM
Reserved
Reserved
“Modes of Operation” on page
Mode of
Normal
Correct
Correct
CTC
Description
Reserved.
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
(1)
“Phase Correct PWM Mode” on
Update of
Immediate
Immediate
BOTTOM
BOTTOM
OCRx at
TOP
TOP
176).
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
(1)(2)
189

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