MFRC53101T/0FE,112 NXP Semiconductors, MFRC53101T/0FE,112 Datasheet - Page 51

IC MIFARE HS READER 32-SOIC

MFRC53101T/0FE,112

Manufacturer Part Number
MFRC53101T/0FE,112
Description
IC MIFARE HS READER 32-SOIC
Manufacturer
NXP Semiconductors
Series
MIFARE®r
Datasheets

Specifications of MFRC53101T/0FE,112

Rf Type
Read Only
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B, ISO15693
Package / Case
32-SOIC (0.300", 7.50mm Width)
Product
RFID Readers
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2224-5
935269691112
MFRC531
MFRC53101TD

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MFRC53101T/0FE,112
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
10.5.1.6 SecondaryStatus register
10.5.1.7 InterruptEn register
Various secondary status flags.
Table 49.
Table 50.
Control bits to enable and disable passing of interrupt requests.
Table 51.
Table 52.
[1]
Bit
Symbol
Access
Bit
7
6
5
4 to 3 00
2 to 0 RxLastBits[2:0]
Bit
Symbol
Access
Bit
7
6
5
4
3
2
1
0
This bit can only be set or cleared using bit SetIEn.
Symbol
SetIEn
0
TimerIEn
TxIEn
RxIEn
IdleIEn
HiAlertIEn -
LoAlertIEn -
Symbol
TRunning
E2Ready
CRCReady
TRunning
SecondaryStatus register (address: 05h) reset value: 01100 000b, 60h bit
allocation
SecondaryStatus register bit descriptions
InterruptEn register (address: 06h) reset value: 0000 0000b, 00h bit allocation
InterruptEn register bit descriptions
SetIEn
W
R
7
7
Value
1
0
-
-
-
-
-
Rev. 3.4 — 26 January 2010
E2Ready
R/W
Value Description
1
0
1
0
1
0
-
-
6
0
R
6
Description
indicates that the marked bits in the InterruptEn register are set
clears the marked bits
reserved
sends the TimerIRq timer interrupt request to pin IRQ
sends the TxIRq transmitter interrupt request to pin IRQ
sends the RxIRq receiver interrupt request to pin IRQ
sends the IdleIRq idle interrupt request to pin IRQ
sends the HiAlertIRq high alert interrupt request to pin IRQ
sends the LoAlertIRq low alert interrupt request to pin IRQ
TimerIEn
the timer unit is running and the counter decrements the
TimerValue register on the next timer clock cycle
the timer unit is not running
EEPROM programming is finished
EEPROM programming is ongoing
CRC calculation is finished
CRC calculation is ongoing
reserved
shows the number of valid bits in the last received byte. If zero,
the whole byte is valid
056634
R/W
CRCReady
5
R
5
TxIEn
R/W
4
4
RxIEn
R/W
00
R
3
3
IdleIEn HiAlertIEn LoAlertIEn
R/W
2
ISO/IEC 14443 reader IC
2
RxLastBits[2:0]
MFRC531
[1]
R/W
© NXP B.V. 2010. All rights reserved.
1
[1]
[1]
R
1
[1]
[1]
[1]
R/W
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0
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