MFRC53101T/0FE,112 NXP Semiconductors, MFRC53101T/0FE,112 Datasheet - Page 21
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MFRC53101T/0FE,112
Manufacturer Part Number
MFRC53101T/0FE,112
Description
IC MIFARE HS READER 32-SOIC
Manufacturer
NXP Semiconductors
Series
MIFARE®r
Specifications of MFRC53101T/0FE,112
Rf Type
Read Only
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B, ISO15693
Package / Case
32-SOIC (0.300", 7.50mm Width)
Product
RFID Readers
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2224-5
935269691112
MFRC531
MFRC53101TD
935269691112
MFRC531
MFRC53101TD
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MFRC53101T/0FE,112
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
9.4.3 Configuration of pin IRQ
9.4.4 Register overview interrupt request system
The logic level of the IRq flag bit is visible on pin IRQ. The signal on pin IRQ can also be
controlled using the following IRQPinConfig register bits.
Remark: During the reset phase (see
logic 1 and bit IRQPushPull is set to logic 0. This results in a high-impedance on pin IRQ.
Table 21
Table 21.
Flags
HiAlertIEn
HiAlertIRq
IdleIEn
IdleIRq
IRq
IRQInv
IRQPushPull
LoAlertIEn
LoAlertIRq
RxIEn
RxIRq
SetIEn
SetIRq
TimerIEn
TimerIRq
TxIEn
TxIRq
•
•
bit IRQInv: the signal on pin IRQ is equal to the logic level of bit IRq when this bit is set
to logic 0. When set to logic 1, the signal on pin IRQ is inverted with respect to bit IRq.
bit IRQPushPull: when set to logic 1, pin IRQ has CMOS output characteristics. When
it is set to logic 0, it is an open-drain output which requires an external resistor to
achieve a HIGH-level at pin IRQ.
shows the related interrupt request system flags in alphabetical order.
Associated Interrupt request system registers and flags
Rev. 3.4 — 26 January 2010
Register name
InterruptEn
InterruptRq
InterruptEn
InterruptRq
PrimaryStatus
IRQPinConfig
IRQPinConfig
InterruptEn
InterruptRq
InterruptEn
InterruptRq
InterruptEn
InterruptRq
InterruptEn
InterruptRq
InterruptEn
InterruptRq
056634
Section 9.7.2 on page
Bit
1
1
2
2
3
1
0
0
0
3
3
7
7
5
5
4
4
28) bit IRQInv is set to
ISO/IEC 14443 reader IC
MFRC531
Register address
06h
07h
06h
07h
03h
07h
07h
06h
07h
06h
07h
06h
07h
06h
07h
06h
07h
© NXP B.V. 2010. All rights reserved.
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