EM250-DEV Ember, EM250-DEV Datasheet - Page 92

KIT DEV FOR EM250

EM250-DEV

Manufacturer Part Number
EM250-DEV
Description
KIT DEV FOR EM250
Manufacturer
Ember
Series
InSightr
Type
802.15.4/Zigbeer
Datasheets

Specifications of EM250-DEV

Frequency
2.4GHz
For Use With/related Products
EM250
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
636-1002
EM250
TMR2_CFG [0x458C]
TMR2_CNT [0x4580]
TMR2_TOP [0x4586]
92
TMR_EXTEN
TMR_EN
TMR_BIDIR
TMR_DOWN
TMR_1SHOT
TMR_PSCL
TMR_FILT
TMR_EDGE
TMR_CLK
TMR2_CNT
TMR2_TOP
0-RW
0-RW
0-RW
1-RW
1-RW
0-R
15
15
15
0
7
7
7
120-0082-000I
0-RW
0-RW
0-RW
1-RW
1-RW
0-R
14
14
14
0
6
6
6
[12]
[11]
[10]
[9]
[8]
[7:4]
[3]
[2]
[1:0]
[15:0]
[15:0]
TMR_PSCL
Control bit for the external enable mask on a pin. When this bit is clear, do not check status
of the TMR2ENMSK pin. When this bit is set, check status of the TMR2ENMSK pin.
Set this bit to enable counting. To change other register bits, this bit must be cleared.
Set this bit to enable bi-directional alternation mode.
Initial count direction after enabling the timer. Clear this bit to count up; set this bit to
count down.
Clear this bit for auto repetition mode. Set this bit for a single shot.
Clock divider setting (N). The possible clock divisors are: 0 - 2^N (N=0..10).
Set this bit to enable clock source glitch filtering.
Clock source edge selection. Clear this bit for rising edge; set this bit for falling edge.
Clock source selection: 0 = calibrated RC oscillator (default); 1 = 32kHz; 2 = 12MHz; 3 =
External (GPIO).
Current Timer 2 counter value. When read, returns the current timer counter. When written,
overwrites the timer counter and restarts wrap detection.
Timer 2 threshold value.
0-RW
0-RW
0-RW
1-RW
1-RW
0-R
13
13
13
0
5
5
5
TMR_EXTEN
0-RW
0-RW
0-RW
0-RW
1-RW
1-RW
12
12
12
4
4
4
TMR2_CNT
TMR2_CNT
TMR2_TOP
TMR2_TOP
TMR_FILT
TMR_EN
0-RW
0-RW
0-RW
0-RW
1-RW
1-RW
11
11
11
3
3
3
TMR_EDGE
TMR_BIDIR
0-RW
0-RW
0-RW
0-RW
1-RW
1-RW
10
10
10
2
2
2
TMR_DOWN
0-RW
0-RW
0-RW
0-RW
1-RW
1-RW
9
1
9
1
9
1
TMR_CLK
TMR_1SHOT
0-RW
0-RW
0-RW
0-RW
1-RW
1-RW
8
0
8
0
8
0

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