AD8339ACPZ Analog Devices Inc, AD8339ACPZ Datasheet - Page 4

• Manufacturer Part Number: AD8339ACPZ
• Description: IC I/Q DEMOD QUAD 50MHZ 40-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD8339ACPZ

• Function: Demodulator
• Lo Frequency: 0Hz ~ 200MHz
• Rf Frequency: 0Hz ~ 50MHz
• P1db: 14.8dBm
• Gain: -1.3dB
• Noise Figure: 11.5dB
• Current - Supply: 35mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Package / Case: 40-VFQFN, 40-CSP, Exposed Pad
• Frequency Range: DC To 50MHz
• Rf Type: Quadrature
• Supply Voltage Range: ± 4.5V To ± 5.5V
• Rf Ic Case Style: LFCSP
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD8339-EVALZ - BOARD EVAL AD8339 I/Q DEMOD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD8339
Parameter
LOGIC INTERFACES
SPI TIMING CHARACTERISTICS
POWER SUPPLY
Pin SDI, Pin CSB, Pin SCLK, Pin RSET
Pin RSTS
Bias Current
Input Resistance
LO Divider RSET Setup Time
LO Divider RSET High Pulse Width
LO Divider RSET Response Time
Phase Response Time
Enable Response Time
Output
SCLK Frequency
CSB Fall to SCLK Setup Time
SCLK High Pulse Width
SCLK Low Pulse Width
Data Access Time (SDO) After SCLK
Data Setup Time Before SCLK Rising
Data Hold Time After SCLK Rising
SCLK Rise to CSB Rise Hold Time
CSB Rise to SCLK Rise Hold Time
Supply Voltage
Current
Quiescent Power
Disable Current
PSRR
Logic Level High
Logic Level Low
Logic Level High
Logic Level Low
Logic Level High
Logic Level Low
Rising Edge
Edge
Edge
Over Temperature,
−40°C < T
A
< +85°C
Test Conditions/Comments
Logic high (pulled to 5 V)
Logic low (pulled to GND)
RSET rising or falling edge to 4LOP or 4LON (differential)
rising edge
Measured from CSB going high
Measured from CSB going high (with 0.1 μF capacitor on
Pin LODC); no channel enabled
At least one channel enabled
Pin SDO loaded with 5 pF and next SDI input
Pin SDI, Pin SDO, Pin CSB, Pin SCLK, Pin RSTS
f
t
t
t
t
t
t
t
t
Pin VPOS, Pin VNEG
VPOS, all phase bits = 0
VNEG, all phase bits = 0
VPOS, all phase bits = 0
VNEG, all phase bits = 0
Per channel, all phase bits = 0
Per channel maximum (depends on phase bits)
All channels disabled; SPI stays on
VPOS to Ix/Qx outputs, @ 10 kHz
VNEG to Ix/Qx outputs, @ 10 kHz
CLK
1
2
3
4
5
6
7
8
Rev. A | Page 4 of 36
Min
1.8
5
20
0
10
10
2
2
15
0
±4.5
1.5
1.7
33
−19
Typ
0.5
0
4
200
5
12
500
1.9
0.2
±5.0
35
−18
66
88
2.75
−85
−85
Max
0.9
1.2
15
0.5
10
100
±5.5
36
−17
Unit
V
V
V
V
μA
μA
MΩ
ns
ns
ns
μs
μs
ns
V
V
MHz
ns
ns
ns
ns
ns
ns
ns
ns
V
mA
mA
mA
mA
mW
mW
mA
dB
dB