AD8339ACPZ Analog Devices Inc, AD8339ACPZ Datasheet

IC I/Q DEMOD QUAD 50MHZ 40-LFCSP

AD8339ACPZ

Manufacturer Part Number
AD8339ACPZ
Description
IC I/Q DEMOD QUAD 50MHZ 40-LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8339ACPZ

Function
Demodulator
Lo Frequency
0Hz ~ 200MHz
Rf Frequency
0Hz ~ 50MHz
P1db
14.8dBm
Gain
-1.3dB
Noise Figure
11.5dB
Current - Supply
35mA
Voltage - Supply
4.5 V ~ 5.5 V
Package / Case
40-VFQFN, 40-CSP, Exposed Pad
Frequency Range
DC To 50MHz
Rf Type
Quadrature
Supply Voltage Range
± 4.5V To ± 5.5V
Rf Ic Case Style
LFCSP
No. Of Pins
40
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD8339-EVALZ - BOARD EVAL AD8339 I/Q DEMOD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8339ACPZ
Manufacturer:
Analog Devices Inc
Quantity:
135
FEATURES
Quad integrated I/Q demodulator
16 phase select on each output (22.5° per step)
Quadrature demodulation accuracy
Bandwidth
Output dynamic range: 160 dB/Hz
LO drive: >0 dBm (50 Ω), single-ended sine wave
Supply: ±5 V
Power consumption: 73 mW/channel (290 mW total)
Power-down via SPI (each channel and complete chip)
APPLICATIONS
Medical imaging (CW ultrasound beamforming)
Phased array systems
Communication receivers
GENERAL DESCRIPTION
The AD8339
driven by a low noise preamplifier with differential outputs. It is
optimized for the LNA in the
of VGAs. The part consists of four identical I/Q demodulators
with a 4× local oscillator (LO) input that divides the signal and
generates the necessary 0° and 90° phases of the internal LO
that drive the mixers. The four I/Q demodulators can be used
independently of each other (assuming that a common LO is
acceptable) because each has a separate RF input.
Continuous wave (CW) analog beamforming (ABF) and I/Q
demodulation are combined in a single 40-lead, ultracompact
chip scale device, making the AD8339 particularly applicable in
high density ultrasound scanners. In an ABF system, time
domain coherency is achieved following the appropriate phase
alignment and summation of multiple receiver channels. A reset
pin synchronizes multiple ICs to start each LO divider in the
same quadrant. Sixteen programmable 22.5° phase increments
are available for each channel. For example, if Channel 1 is used
as a reference and Channel 2 has an I/Q phase lead of 45°, the
user can phase align Channel 2 with Channel 1 by choosing the
appropriate phase select code.
1
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Patent pending.
Phase accuracy: ±1°
Amplitude imbalance: ±0.05 dB
4LO: LF to 200 MHz
RF: LF to 50 MHz
Baseband: determined by external filtering
Radar
Adaptive antennas
1
is a quad I/Q demodulator configured to be
AD8332/AD8334/AD8335
family
DC to 50 MHz, Quad I/Q Demodulator
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The mixer outputs are in current form for convenient summa-
tion. The independent I and Q mixer output currents are summed
and converted to a voltage by a low noise, high dynamic range,
current-to-voltage (I-V) transimpedance amplifier, such as the
AD8021
combined signal is applied to a high resolution analog-to-digital
converter (ADC), such as the
An SPI-compatible serial interface port is provided to easily
program the phase of each channel; the interface allows daisy
chaining by shifting the data through each chip from SDI to SDO.
The SPI also allows for power-down of each individual channel
and the complete chip. During power-down, the serial interface
remains active so that the device can be programmed again.
The dynamic range is typically 160 dB/Hz at the I and Q
outputs. The AD8339 is available in a 6 mm × 6 mm, 40-lead
LFCSP and is specified over the industrial temperature range of
−40°C to +85°C.
VNEG
SCLK
VPOS
RSTS
RF2N
4LOP
4LON
RF3N
RF2P
RF3P
SDO
CSB
SDI
or the AD829. Following the current summation, the
AD8339
FUNCTIONAL BLOCK DIAGRAM
INTERFACE
BIAS
÷4
SERIAL
©2007–2009 Analog Devices, Inc. All rights reserved.
90°
and Phase Shifter
RF1N
RF4N
Figure 1.
AD7665
RF1P
RF4P
(16-bit, 570 kSPS).
Φ
Φ
Φ
Φ
Φ
Φ
Φ
Φ
AD8339
www.analog.com
I1OP
Q1OP
I2OP
Q2OP
I3OP
Q3OP
I4OP
Q4OP

Related parts for AD8339ACPZ

AD8339ACPZ Summary of contents

Page 1

FEATURES Quad integrated I/Q demodulator 16 phase select on each output (22.5° per step) Quadrature demodulation accuracy Phase accuracy: ±1° Amplitude imbalance: ±0.05 dB Bandwidth 4LO 200 MHz RF MHz Baseband: determined by external filtering ...

Page 2

AD8339 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ...

Page 3

SPECIFICATIONS V = ± 25° MHz noted. Single-channel AD8021 LPF values: R Table 1. Parameter OPERATING CONDITIONS Local Oscillator (LO) Frequency Range RF Frequency Range Baseband Bandwidth LO Input ...

Page 4

AD8339 Parameter LOGIC INTERFACES Pin SDI, Pin CSB, Pin SCLK, Pin RSET Logic Level High Logic Level Low Pin RSTS Logic Level High Logic Level Low Bias Current Input Resistance LO Divider RSET Setup Time LO Divider RSET High Pulse ...

Page 5

ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Voltages Supply Voltage ( Inputs 4LO Inputs Outputs (IxOP, QxOP) Digital Inputs SDO Output LODC Pin Thermal Data (4-Layer JEDEC Board, No Airflow, Exposed Pad Soldered to PCB) θ JA θ ...

Page 6

AD8339 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions Pin No. Mnemonic Description RF Inputs. Require external 2.5 V bias for optimum symmetrical input differential swing if ±5 V supplies 10, 13, RF1P to RF4P, ...

Page 7

EQUIVALENT INPUT CIRCUITS VPOS SCLK CSB LOGIC SDI INTERFACE RSET COMM Figure 3. SCLK, CSB, SDI, and RSET Logic Inputs VPOS LOGIC RSTS INTERFACE COMM Figure 4. RSTS Logic Input VPOS 4LOP 4LON COMM Figure 5. Local Oscillator Inputs VPOS ...

Page 8

AD8339 TYPICAL PERFORMANCE CHARACTERISTICS V = ± 25° MHz typical of all channels, differential voltages, dBm (50 Ω), phase select code = 0000, unless otherwise noted (see Figure 42). ...

Page 9

RF FREQUENCY (Hz) Figure 15. Representative Range of Quadrature Phase Error vs. RF Frequency for All Channels and Codes 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 100 ...

Page 10

AD8339 1.4 I OUTPUT OF CHANNEL 1 SHOWN TRANSCONDUCTANCE = [(V /787Ω)/V BB 1.3 1.2 1.1 1.0 PHASE DELAY = 0° 0.9 PHASE DELAY = 22.5° PHASE DELAY = 45° PHASE DELAY = 67.5° 0.8 1M 10M RF FREQUENCY (Hz) ...

Page 11

LO LEVEL = 0dBm –10 –20 –30 –40 –50 –60 –70 –80 –90 1M 10M RF FREQUENCY (Hz) Figure 27. Representative Range of LO Leakage vs. RF Frequency at I and Q Outputs 0 LO LEVEL = 0dBm –20 ...

Page 12

AD8339 CH2 500mV CH3 1.00V Ω M200ns T 608.000ns Figure 33. Enable Response vs. CSB (Filter Disabled to Show Response) with a Previously Enabled Channel (See Figure 44 CH2 AMPL 1.82V CH3 1.00V Ω CH2 ...

Page 13

CH3 1.00V Ω CH2 1.00V M40.0µs A CH3 CH4 1.00V T 46.4000µs Figure 39. Phase Switching Response at 180° (Top: CSB) 0 –10 –20 –30 –40 –50 VNEG –60 VPOS –70 –80 –90 –100 10k 100k 1M FREQUENCY ...

Page 14

AD8339 TEST CIRCUITS 120nH LPF 50Ω SIGNAL GENERATOR 120nH LPF 50Ω SIGNAL GENERATOR 120nH LPF 50Ω SIGNAL GENERATOR AD8334 LNA 20Ω FB 0.1µF RFxP IxOP AD8339 RFxN QxOP 0.1µF 20Ω 4LOP 50Ω SIGNAL GENERATOR Figure 42. Default Test Circuit AD8334 ...

Page 15

AD8334 LNA 120nH 20Ω FB 0.1µF RFxP LPF AD8339 RFxN 50Ω 0.1µF 20Ω RSET 4LOP SIGNAL GENERATOR 50Ω SIGNAL GENERATOR Figure 45. LO Reset Response AD8334 LNA 120nH 20Ω FB 0.1µF RFxP LPF RFxN 50Ω 0.1µF 20Ω SIGNAL GENERATOR SIGNAL ...

Page 16

AD8339 SPLITTER –9.5dB 50Ω SIGNAL GENERATOR SIGNAL GENERATOR SPLITTER –9.5dB 50Ω SIGNAL GENERATOR SIGNAL GENERATOR 120nH LPF 50Ω SIGNAL GENERATOR AD8334 LNA 120nH 20Ω FB 0.1µF RFxP IxOP AD8339 RFxN QxOP 0.1µF 20Ω 50Ω 4LOP 50Ω SIGNAL GENERATOR Figure 48. ...

Page 17

SIGNAL VPOS GENERATOR VPOS RFxP IxOP AD8339 0.1µF RFxN QxOP 4LOP SIGNAL VPOS GENERATOR Figure 51. PSRR Rev Page SPECTRUM ANALYZER AD8339 ...

Page 18

AD8339 THEORY OF OPERATION RSTS RF2N 1 RF2P 2 COMM 3 COMM 4 INTERFACE SCLK 5 CSB 6 VPOS 7 VPOS 8 BIAS RF3P 9 RF3N 10 AD8339 VPOS The AD8339 is a quad I/Q demodulator with a programmable phase ...

Page 19

QUADRATURE GENERATION The internal 0° and 90° LO phases are digitally generated by a divide-by-4 logic circuit. The divider is dc-coupled and inherently broadband; the maximum LO frequency is limited only by its switching speed. The duty cycle of the ...

Page 20

AD8339 To determine the input referred noise important to know the active low-pass filter (LPF) values R Figure 53. Typical filter values for a single channel are 1.58 kΩ for R and 1 nF for C ; these ...

Page 21

Combining Phase Compensation and Analog Beamforming Modern ultrasound machines used for medical applications employ an array of receivers for beamforming, with typical CW Doppler array sizes receiver channels that are phase shifted and summed together to ...

Page 22

AD8339 AD8339 OUTPUTS AT 3.1mA PEAK EACH WHEN PHASE SHIFT IS SET FOR 45° FIRST ORDER SUMMING AMPLIFIER(S) C1 LPF1 SUMMING AMPLIFIERS 18nF 88kHz R1 +2.8V BASEBAND 100Ω SIGNAL +5V 0.1µF HPF 1100Hz C2 ...

Page 23

SERIAL INTERFACE The AD8339 contains a 4-wire, SPI-compatible digital interface (SDI, SCLK, CSB, and SDO). The interface comprises a 20-bit shift register plus a latch. The shift register is loaded MSB first. Phase selection and channel enabling information are contained ...

Page 24

AD8339 APPLICATIONS INFORMATION The AD8339 is the key component of a phase shifter system that aligns time-skewed information contained in RF signals. Combined with a variable gain amplifier (VGA) and a low noise amplifier (LNA the AD8332/AD8334/AD8335 family, ...

Page 25

EVALUATION BOARD Figure photograph of the AD8339 evaluation board; the schematic diagrams are shown in Figure 63, Figure 64, and Figure 65. Four single-ended RF inputs can be phase aligned using the LNA inputs of an AD8334 ...

Page 26

AD8339 CONNECTIONS TO THE BOARD Table list of equipment required to activate the board with suggested test equipment, and Figure 61 shows a typical setup. A green LED glows (signifying that the 5 V power through the ...

Page 27

AD8334 LNA COMMON SIGNAL PATH Figure 59. AD8339 Test Configuration—Common Input Signal Drive Figure 60. AD8339-EVALZ with AD9271 Evaluation Board Attached as Input Source AD8339 ...

Page 28

AD8339 TOP: SIGNAL GENERATOR FOR 4LO INPUT (FOR EXAMPLE, 20MHz, 1Vp-p) BOTTOM: SIGNAL GENERATOR FOR RF INPUT (FOR EXAMPLE, 5.01MHz) SYNCHRONIZE GENERATORS PERSONAL COMPUTER USB CABLE +5V Figure 61. AD8339-EVALZ Typical Test Setup Rev Page ...

Page 29

Using the SPI Port Channel and phase selection are accessed via the SPI port on the AD8339, and the evaluation board provides two means of access desired to exercise the SPI input with custom waveforms, the SDI, ...

Page 30

AD8339 L10 C67 IN1 120nH 0.1µF IN1S L7 IN2 120nH C60 0.1µF IN2S C8 22pF COM2 1 INH2 CFB2 18nF 2 LMD2 IDENTIFIER C43 RFB2 0.1µF 274Ω 3 COM2X R44 20Ω 4 LON2 LON2 R43 RF2 20Ω 5 LOP2 LOP2 ...

Page 31

1kΩ 1kΩ 1kΩ CSB CSBG CSB SCLK SLKG SCLK SDI SDI RSTS VPIS VPOS RF1P RF1N R36 R32 5.23kΩ 2.8kΩ 0.1µF R31 R30 5V 2.8kΩ 4.22kΩ R68 5.23kΩ R71 RSTS 2.8kΩ ...

Page 32

AD8339 L11 1µF 120nH 10V + C78 C77 0.1µF 0.1µ OUT GND A6 OUT TAB ADP3339AKCZ-3 RDY0/SLRD 2 NC RDY1/SLWR 3. AVCC C69 24MHz 0.1µF 4 XTALOUT 5 ...

Page 33

AD8339-EVALZ ARTWORK Figure 66 through Figure 69 show the artwork for the AD8339-EVALZ. Figure 66. AD8339-EVALZ Component Side Copper Figure 67. AD8339-EVALZ Wiring Side Copper Rev Page AD8339 ...

Page 34

AD8339 Figure 68. AD8339-EVALZ Component Side Silkscreen Figure 69. AD8339-EVALZ Assembly Rev Page ...

Page 35

... SEATING PLANE ORDERING GUIDE Model Temperature Range 1 AD8339ACPZ −40°C to +85°C 1 AD8339ACPZ-R7 −40°C to +85°C 1 AD8339ACPZ-RL −40°C to +85°C 1 AD8339-EVALZ RoHS Compliant Part. 0.60 MAX 0.50 BSC 5.75 BSC SQ 0.50 0.40 0.30 0.80 MAX 0.65 TYP ...

Page 36

AD8339 NOTES ©2007–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06587-0-2/09(A) Rev Page ...

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