HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 563
HD64F2239TF20I
Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2238RFA6V.pdf
(1048 pages)
Specifications of HD64F2239TF20I
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Notes: 1. Do not execute this command in slave communications. Execute this command after
Bit
7 to 3 ⎯
2
1
0
Bit Name
CMD2
CMD1
CMD0
2. This command is valid during master communications (MRQ = 1). In other states, this
3. This command is valid during slave communications (SRQ = 1). In other states, this
slave communications ends or in master communications. If this command is issued in
slave communications, this command is ignored.
command issuance is ignored. If this command is issued in master communications, the
communications controller immediately enters the wait state. At this time, the issued
master transmission request ends (MRQ = 0).
command issuance is ignored. Once this command was issued in slave transmission,
the SRQ flag is 0 before slave transmission. Therefore, a transmit request from the
master is not responded. If a transmit request is issued during slave transmission, the
transmission stops and the wait state is entered (SRQ = 0).
Initial
Value
All 0
0
0
0
R/W
⎯
W
W
W
Description
Reserved
The read value is undefined. In order to avoid malfunction,
do not use bit manipulation instructions. These bits cannot
be modified.
Command Bits
These bits issue a command to control IEB
communications. When the CMX flag in IEFLG is set after
the command issuance, the command is indicated to be in
execution. When the CMX flag becomes 0, the operation
state is entered. These bits are read as 0. The read value
is undefined. Do not use a bit manipulation instruction that
causes malfunction.
000: No operation. Operation is not affected.
001: Unlock (required from other units) *
010: Requires communications as the master
011: Stops master communications *
100: Undefined bits. Operation is not affected by this
101: Requires data transfer from the slave.
110: Stops data transfer from the slave *
111: Undefined bits. Operation is not affected by this
Section 14 IEBus™ Controller (IEB) [H8S/2258 Group]
command.
command.
Rev. 6.00 Mar. 18, 2010 Page 501 of 982
2
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