HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 416
HD64F2239TF20I
Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2238RFA6V.pdf
(1048 pages)
Specifications of HD64F2239TF20I
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 10 I/O Ports
• PF0/BREQ/IRQ2
Note:
10.12
Port G is a 5-bit I/O port and has the following registers.
• Port G data direction register (PGDDR)
• Port G data register (PGDR)
• Port G register (PORTG)
10.12.1 Port G Data Direction Register (PGDDR)
PGDDR specifies input or output of the port G pins using the individual bits. PGDDR cannot be
read; if it is, an undefined value will be read. This register is a write-only register, and cannot be
written by bit manipulation instruction. For details, see section 2.9.4, Access Methods for
Registers with Write-Only Bits.
Note:
Rev. 6.00 Mar. 18, 2010 Page 354 of 982
REJ09B0054-0600
Operating mode
BRLE
PF0DDR
Pin functions
Bit
7 to
5
4
3
2
1
0
The pin functions are switched as shown below according to the combination of operating
mode, the BRLE bit, and the PF0DDR bit.
* When this pin is used as an external interrupt pin, do not specify other functions.
* In modes 4 and 5, initial value is 1. In modes 6 and 7, initial value is 0.
Bit Name
⎯
PG4DDR
PG3DDR
PG2DDR
PG1DDR
PG0DDR
Port G
PF0 input pin
Initial
Value
Undefined
0/1 *
0
0
0
0
0
0
R/W
W
W
W
W
W
⎯
Modes 4 to 6
PF0 output
pin
1
Description
Reserved
These bits are always read as undefined value.
When a pin is specified as a general purpose I/O port,
setting this bit to 1 makes the corresponding port G
pin an output port. Clearing this bit to 0 makes the pin
an input port.
IRQ2 input pin *
BREQ input
pin
⎯
1
PF0 input pin
0
Mode 7
⎯
PF0 output
pin
1
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