HD6417032F20 Renesas Electronics America, HD6417032F20 Datasheet - Page 444

IC SUPERH MPU ROMLESS 112QFP

HD6417032F20

Manufacturer Part Number
HD6417032F20
Description
IC SUPERH MPU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 14 A/D Converter
Bit 7—A/D End Flag (ADF): ADF indicates that A/D conversion is completed.
Bit 7 (ADF)
0
1
Bit 6—A/D Interrupt Enable (ADIE): ADIE selects whether or not an A/D interrupt (ADI) is
requested when A/D conversion is completed.
Bit 6 (ADIE)
0
1
Bit 5—A/D Start (ADST): ADST selects the start or halting of A/D conversion. Whenever the
A/D converter is operating, this bit is set to 1. It can also be set to 1 by the A/D conversion trigger
input pin (ADTRG).
Bit 5 (ADST)
0
1
Bit 4—Scan Mode (SCAN): SCAN selects either scan mode or single mode for operation. See
section 14.4, Operation, for descriptions of these modes. The mode should be changed only when
the ADST bit is cleared to 0.
Bit 4 (SCAN)
0
1
Rev. 7.00 Jan 31, 2006 page 416 of 658
REJ09B0272-0700
Description
Cleared to 0 under the following conditions:
Set to 1 at the following times:
Description
The A/D interrupt (ADI) request is disabled
The A/D interrupt (ADI) request is enabled
Description
A/D conversion is halted
Description
Single mode
Scan mode
The CPU reads the ADF bit while the bit is set to 1, then writes 0 in the bit
The ADI starts the DMAC and the A/D conversion register is accessed
Single mode: When A/D conversion is complete
Scan mode: When A/D conversion of all selected channels is complete
Single mode: A/D conversion is performed. This bit is automatically cleared
to 0 at the end of the conversion.
Scan mode: A/D conversion starts and continues cyclically on the selected
channels until this bit is cleared to 0 by software, a reset, or standby mode.
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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