C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 255

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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21.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging, FLASH program-
ming, and boundary scan functions may be performed. This is possible because C2 communication is typically per-
formed when the device is in the halt state, where all on-chip peripherals and user software are stalled. In this halted
state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P3.0) pins. In most applications, external
resistors are required to isolate C2 interface traffic from the user application. A typical isolation configuration is
shown in Figure 21.6.
The configuration in Figure 21.6 assumes the following:
Additional resistors may be necessary depending on the specific application.
1.
2.
The user input (b) cannot change state while the target device is halted.
The /RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 21.6. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.1
C2CK
C2D
C8051Fxxx
C8051F320/1
255

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