C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 189

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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16.5.3. Slave Receiver Mode
Serial data is received on SDA and the clock is received on SCL. When slave events are enabled (INH = 0), the inter-
face enters Slave Receiver Mode when a START followed by a slave address and direction bit (WRITE in this case)
is received. Upon entering Slave Receiver Mode, an interrupt is generated and the ACKRQ bit is set. Software
responds to the received slave address with an ACK, or ignores the received slave address with a NACK. If the
received slave address is ignored, slave interrupts will be inhibited until the next START is detected. If the received
slave address is acknowledged, zero or more data bytes are received. Software must write the ACK bit after each
received byte to ACK or NACK the received byte. The interface exits Slave Receiver Mode after receiving a STOP.
Note that the interface will switch to Slave Transmitter Mode if SMB0DAT is written while an active Slave Receiver.
Figure 16.10 shows a typical Slave Receiver sequence. Two received data bytes are shown, though any number of
bytes may be received. Notice that the ‘data byte transferred’ interrupts occur before the ACK cycle in this mode.
S
Received by SMBus
Interface
Transmitted by
SMBus Interface
SLA
Figure 16.10. Typical Slave Receiver Sequence
Interrupt
W
A
Data Byte
Interrupt
Rev. 1.1
A
S = START
P = STOP
A = ACK
W = WRITE
SLA = Slave Address
Data Byte
Interrupt
A
Interrupt
C8051F320/1
P
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