C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 167

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F320/1
15.12.2.Endpoints1-3 IN Isochronous Mode
When the ISO bit (EINCSRH.6) is set to ‘1’, the target endpoint operates in Isochronous (ISO) mode. Once an end-
point has been configured for ISO IN mode, the host will send one IN token (data request) per frame; the location of
data within each frame may vary. Because of this, it is recommended that double buffering be enabled for ISO IN
endpoints.
Hardware will automatically reset INPRDY (EINCSRL.0) to ‘0’ when a packet slot is open in the endpoint FIFO.
Note that if double buffering is enabled for the target endpoint, it is possible for firmware to load two packets into the
IN FIFO at a time. In this case, hardware will reset INPRDY to ‘0’ immediately after firmware loads the first packet
into the FIFO and sets INPRDY to ‘1’. An interrupt will not be generated in this case; an interrupt will only be gener-
ated when a data packet is transmitted.
If there is not a data packet ready in the endpoint FIFO when USB0 receives an IN token from the host, USB0 will
transmit a zero-length data packet and set the UNDRUN bit (EINCSRL.2) to ‘1’.
The ISO Update feature (see
Section
15.7) can be useful in starting a double buffered ISO IN endpoint. If the host has
already set up the ISO IN pipe (has begun transmitting IN tokens) when firmware writes the first data packet to the
endpoint FIFO, the next IN token may arrive and the first data packet sent before firmware has written the second
(double buffered) data packet to the FIFO. The ISO Update feature ensures that any data packet written to the end-
point FIFO will not be transmitted during the current frame; the packet will only be sent after a SOF signal has been
received.
Rev. 1.1
167

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