C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 129

• Manufacturer Part Number: C8051F320
• Description: IC 8051 MCU 16K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F320

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.1. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 14.3) assigns a priority to each I/O function, starting at the top with UART0.
When a digital resource is selected, the least-significant unassigned Port pin is assigned to that resource (excluding
UART0, which is always at pins 4 and 5). If a Port pin is assigned, the Crossbar skips that pin when assigning the next
selected resource. Additionally, the Crossbar will skip Port pins whose associated bits in the PnSKIP registers are set.
The PnSKIP registers allow software to skip Port pins that are to be used for analog input, dedicated functions, or
GPIO.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the Crossbar, its
corresponding PnSKIP bit should be set. This applies to P0.7 if VREF is used, P0.3 and/or P0.2 if the external oscil-
lator circuit is enabled, P0.6 if the ADC is configured to use the external conversion start signal (CNVSTR), and any
selected ADC or Comparator inputs. The Crossbar skips selected pins as if they were already assigned, and moves to
the next unassigned pin. Figure 14.3 shows the Crossbar Decoder priority with no Port pins skipped (P0SKIP,
P1SKIP, P2SKIP = 0x00); Figure 14.4 shows the Crossbar Decoder priority with the XTAL1 (P0.2) and XTAL2
(P0.3) pins skipped (P0SKIP = 0x0C).
SF Signals
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
SF Signals
Port pin potentially available to peripheral
Special Function Signals are not assigned by the Crossbar. When these signals are enabled, the Crossbar must
be manually configured to skip their corresponding port pins.
0
0
1
0
Figure 14.3. Crossbar Priority Decoder with No Pins Skipped
2
0
P0SKIP[0:7]
3
0
P0
4
0
*NSS is only pinned out in 4-wire SPI mode
5
0
6
0
7
0
0
0
1
0
2
0
Rev. 1.1
P1SKIP[0:7]
3
0
P1
4
0
5
0
6
0
7
0
0
0
P2SKIP[0:3]
1
0
C8051F320/1
2
0
3
0
P2
4
5
6
7
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